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853S111AYILFT PDF预览

853S111AYILFT

更新时间: 2024-01-24 05:32:58
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
20页 298K
描述
Differential-to-LVPECL/ECL Fanout Buffer

853S111AYILFT 数据手册

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853S111AI DATA SHEET  
Power Considerations  
This section provides information on power dissipation and junction temperature for the 853S111AI.  
Equations and example calculations are also provided.  
1. Power Dissipation.  
The total power dissipation for the 853S111AI is the sum of the core power plus the power dissipated in the load(s).  
The following is the power dissipation for VCC = 3.465V, which gives worst case results.  
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.  
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 74mA = 256.41mW  
Power (outputs)MAX = 32.59mW/Loaded Output pair  
If all outputs are loaded, the total power is 10 * 32.59mW = 325.90mW  
Total Power_MAX (3.8V, with all outputs switching) = 256.41mW + 325.90mW = 582.31mW  
2. Junction Temperature.  
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The  
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond  
wire and bond pad temperature remains below 125°C.  
The equation for Tj is as follows: Tj = JA * Pd_total + TA  
Tj = Junction Temperature  
JA = Junction-to-Ambient Thermal Resistance  
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)  
TA = Ambient Temperature  
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance JA must be used. Assuming a moderate air  
flow of 2.5 meter per second and a multi-layer board, the appropriate value is 67.7°C/W per Table 6 below.  
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:  
85°C + 0.582W * 67.7°C/W = 124.4°C. This is below the limit of 125°C.  
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of  
board (multi-layer).  
Table 6. Thermal Resistance JA for 32 Lead LQFP, Forced Convection  
JA by Velocity  
Meters per Second  
0
1
2.5  
Multi-Layer PCB, JEDEC Standard Test Boards  
80.9°C/W  
71.4°C/W  
67.7°C/W  
Rev A 6/30/15  
14  
LOW SKEW, 1-TO-10, DIFFERENTIAL-TO-LVPECL/ECL FANOUT  
BUFFER  

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