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8531AY-01LFT PDF预览

8531AY-01LFT

更新时间: 2024-11-07 01:21:51
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
18页 269K
描述
Low Skew, 1-to-9, Different ial-to-3.3V LVPECL Fanout Buffer

8531AY-01LFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Lifetime Buy零件包装代码:TQFP
包装说明:LQFP-32针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.24
系列:8531输入调节:DIFFERENTIAL MUX
JESD-30 代码:S-PQFP-G32JESD-609代码:e3
长度:7 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:3功能数量:1
反相输出次数:端子数量:32
实输出次数:9最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP32,.35SQ,32
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:2 ns传播延迟(tpd):2 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.05 ns
座面最大高度:1.6 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mmBase Number Matches:1

8531AY-01LFT 数据手册

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Low Skew, 1-to-9, Differential-to-  
3.3V LVPECL Fanout Buffer  
8531-01  
Data Sheet  
GENERAL DESCRIPTION  
FEATURES  
Nine differential 3.3V LVPECL outputs  
The 8531-01 is  
1 - t o - 9 D i f f e r e n t i a l - t o - 3 . 3 V LV P E C L F a n o u t  
B u f fe r a n d m e m b e r o f t h e fa m i l y o f H i g h  
a
low skew, high perfor mance  
Selectable differential CLK, nCLK or LVPECL clock inputs  
a
Pe r f o r m a n c e C l o c k S o l u t i o n s f r o m I D T. T h e  
8531-01 has two selectable clock inputs. The CLK,  
nCLK pair can accept most standard differential input  
levels. The PCLK, nPCLK pair can accept LVPECL, CML, or  
SSTL input levels. The clock enable is internally synchronized  
to eliminate runt pulses on the outputs during asynchronous  
assertion/deassertion of the clock enable pin.  
CLK, nCLK pair can accept the following differential  
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL  
PCLK, nPCLK supports the following input types:  
LVPECL, CML, SSTL  
Maximum output frequency: 500MHz  
Translates any single ended input signal (LVCMOS, LVTTL,  
GTL) to 3.3V LVPECL levels with resistor bias on nCLK input  
Guaranteed output skew and part-to-part skew character-  
istics make the 8531-01 ideal for high performance work-  
station and server applications.  
Additive phase jitter, RMS: 0.17ps (typical)  
Output skew: 50ps (maximum)  
Part-to-part skew: 250ps (maximum)  
Propagation delay: 2ns (maximum)  
3.3V operating supply  
0°C to 70°C ambient operating temperature  
Available in lead-free (RoHS 6) package  
Industrial Temperature information available upon request  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
32-Lead LQFP  
7mm x 7mm x 1.4mm package body  
Y package  
Top View  
©2016 Integrated Device Technology, Inc  
1
Revision F January 19, 2016  

8531AY-01LFT 替代型号

型号 品牌 替代类型 描述 数据表
8531AY-01LF IDT

完全替代

Low Skew, 1-to-9, Different ial-to-3.3V LVPECL Fanout Buffer
ICS8531AY-01LF IDT

完全替代

Low Skew Clock Driver, 8531 Series, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7

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