Datasheet > 844201

844201

更新时间： 2024-11-05 01:14:43

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
16页	541K
描述
FemtoClock Crystal-to-LVDS Clock Generator

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中文翻译

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数据手册

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844201 数据手册

FemtoClock^®Crystal-to-LVDS

Clock Generator

ICS844201-45

DATASHEET

General Description

Features

The ICS844201-45 is a PCI Express^TMClock Generator. The

ICS844201-45 can synthesize 100MHz or 125MHz reference clock

frequencies with a 25MHz crystal. The ICS844201-45 has excellent

phase jitter performance and is packaged in a small 8-pin TSSOP,

making it ideal for use in systems with limited board space.

• One differential LVDS output

• Crystal oscillator interface designed for 18pF,

25MHz parallel resonant crystal

• VCO range: 490MHz – 680MHz

• RMS phase jitter at 100MHz (12kHz – 20MHz): 0.792ps (typical)

• RMS phase jitter at 125MHz (12kHz – 20MHz): 0.773ps (typical)

• Full 3.3V output supply mode

• PCI Express (2.5Gb/s) and Gen 2 (5Gb/S) jitter compliant

• 0°C to 70°C ambient operating temperature

• Lead-free (RoHS 6) packaging

Frequency Table

Inputs

Output Frequency Range

Crystal Frequency (MHz)

FSEL

Multiplication Value M/N

(MHz)

125 (default)

100

Block Diagram

Pin Assignment

XTAL_IN

GND

XTAL_OUT

XTAL_IN

FSEL

VCO

Phase

Detector

N = ÷5

÷4 (default)

OSC

V^DD

490MHz - 680MHz

XTAL_OUT

ICS844201-45

M = ÷20 (fixed)

8 Lead TSSOP

4.40mm x 3.0mm x 0.925mmpackage body

G Package

Pullup

FSEL

Top View

ICS844201BG-45 REVISION A OCTOBER 1, 2013

12 3 4 5 6 7...16

中文翻译

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