ICS84330
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
Integrated
Circuit
Systems, Inc.
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS84330 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VCC and VCCA
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 2 illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each VCCA pin. The 10Ω
resistor can also be replaced by a ferrit bead.
3.3V
VCC
.01μF
.01μF
10Ω
VCCA
10μF
FIGURE 2. POWER SUPPLY FILTERING
LVCMOS TO XTAL INTERFACE
The XTAL_IN input can accept single ended LVCMOS signal
acteristic impedance trace may be required. The input can
through an AC couple capacitor. A general interface diagram function with half swing amplitude. Reducing amplitude from
is shown in Figure 3. The XTAL_OUT input can be left full swing of 3.3V to half swing of about 1.65V can prevent
signal interfere with power rail and may reduce noise. Please
floating. The edge rate can be as slow as 10ns. If the incom-
ing signal has sharp edge rate and the signal path is a long refer to the LVCMOS driver data sheet and application note
trace, proper termination for the driver and controlled char- for amplitude reduction and termination approach.
3.3V
C1
XTAL_I N
0.1uF
LVCMOS_Driver
XTAL_OU T
Cry stal Interface
Figure 3. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
RECOMMENDATIONS FOR UNUSED INPUT PINS
INPUTS:
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
84330BV
www.icst.com/products/hiperclocks.html
REV.C MAY 16, 2006
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