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8430S07AKILFT PDF预览

8430S07AKILFT

更新时间: 2024-02-04 13:28:25
品牌 Logo 应用领域
艾迪悌 - IDT 时钟发生器
页数 文件大小 规格书
26页 881K
描述
Clock Generator for Cavium Processors

8430S07AKILFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:VFQFPN
包装说明:HVQCCN, LCC32,.2SQ,20针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.22
JESD-30 代码:S-XQCC-N32JESD-609代码:e3
长度:5 mm湿度敏感等级:3
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:133.333 MHz
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3.3 V主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:1 mm
子类别:Clock Generators最大压摆率:170 mA
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:5 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

8430S07AKILFT 数据手册

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ICS8430S07I Data Sheet  
CLOCK GENERATOR FOR CAVIUM PROCESSORS  
2. Junction Temperature.  
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The  
maximum recommended junction temperature for HiPerClockS devices is 125°C. Limiting the internal transistor junction temperature, Tj, to  
125°C ensures that the bond wire and bond pad temperature remains below 125°C.  
The equation for Tj is as follows: Tj = θJA * Pd_total + TA  
Tj = Junction Temperature  
θJA = Junction-to-Ambient Thermal Resistance  
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)  
TA = Ambient Temperature  
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming no air flow and  
a multi-layer board, the appropriate value is 39.5°C/W per Table 7 below.  
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:  
85°C + 0.868W * 39.5°C/W = 119.2°C. This is below the limit of 125°C.  
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of  
board.  
Table 7. Thermal Resistance θJA for 32 Lead VFQFN, Forced Convection  
θJA Vs. Air Flow  
Meters per Second  
0
1
2.5  
Multi-Layer PCB, JEDEC Standard Test Boards  
39.5°C/W  
34.5°C/W  
31.0°C/W  
ICS8430S07AKI REVISION A SEPTEMBER 3, 2009  
20  
©2009 Integrated Device Technology, Inc.  

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