ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇꢂ ꢈ ꢀꢁꢇ ꢃꢄ ꢅꢆ ꢇꢂ
ꢉ ꢊꢋꢌꢍ ꢊꢎꢏ ꢐ ꢌꢑꢒ ꢓꢎ ꢐ ꢔ ꢏ ꢕꢎ ꢑ ꢔꢏꢖ ꢎ ꢀ
ꢗ ꢕꢒꢄ ꢅ ꢏꢐ ꢋꢍ
SCLS299D − JANUARY 1996 − REVISED SEPTEMBER 2003
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
D
D
D
4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Low Power Consumption, 80-µA Max I
Applications Include:
− Buffer/Storage Registers
− Shift Registers
CC
Contain Four Flip-Flops With Double-Rail
Outputs
− Pattern Generators
D
Typical t = 13 ns
pd
SN54HC175 . . . FK PACKAGE
(TOP VIEW)
SN54HC175 . . . J OR W PACKAGE
SN74HC175 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
CLR
1Q
1Q
1D
2D
2Q
2Q
GND
V
CC
4Q
1
2
3
4
5
6
7
8
16
15
3
2
1
20 19
18
4Q
4D
NC
1Q
1D
NC
2D
2Q
4
5
6
7
8
14 4Q
13 4D
12 3D
11 3Q
17
16
15 3D
14
3Q
9 10 11 12 13
10
9
3Q
CLK
NC − No internal connection
description/ordering information
These positive-edge-triggered D-type flip-flops have a direct clear (CLR) input. The ’HC175 devices feature
complementary outputs from each flip-flop.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
SOIC − D
Tube of 25
Tube of 40
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 90
Reel of 2000
Reel of 250
Tube of 25
Tube of 150
Tube of 55
SN74HC175N
SN74HC175N
SN74HC175D
SN74HC175DR
SN74HC175DT
SN74HC175NSR
SN74HC175DBR
SN74HC175PW
SN74HC175PWR
SN74HC175PWT
SNJ54HC175J
SNJ54HC175W
SNJ54HC175FK
HC175
SOP − NS
HC175
HC175
−40°C to 85°C
SSOP − DB
TSSOP − PW
HC175
CDIP − J
CFP − W
LCCC − FK
SNJ54HC175J
SNJ54HC175W
SNJ54HC175FK
−55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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