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83905AG PDF预览

83905AG

更新时间: 2024-11-18 08:08:39
品牌 Logo 应用领域
艾迪悌 - IDT 晶体时钟发生器微控制器和处理器外围集成电路光电二极管
页数 文件大小 规格书
21页 961K
描述
Low Skew, 1:6 Crystal-to- LVCMOS/LVTTL Fanout Buffer

83905AG 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:4.40 X 5 MM, 0.925 MM HEIGHT, MO-153, TSSOP-16针数:16
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.19
Is Samacsys:N其他特性:ALSO OPERATES AT 2.5V AND 3.3V SUPPLY
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:5 mm湿度敏感等级:1
端子数量:16最高工作温度:70 °C
最低工作温度:最大输出时钟频率:100 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):225
电源:1.8/3.3 V主时钟/晶体标称频率:40 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Clock Generators最大供电电压:2 V
最小供电电压:1.6 V标称供电电压:1.8 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

83905AG 数据手册

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Low Skew, 1:6 Crystal-to- LVCMOS/LVTTL  
Fanout Buffer  
ICS83905  
DATA SHEET  
General Description  
Features  
The ICS83905 is a low skew, 1-to-6 LVCMOS /  
LVTTL Fanout Buffer and a member of the  
HiPerClockS™ family of High Performance Clock  
Solutions from IDT. The low impedance  
Six LVCMOS / LVTTL outputs  
S
IC  
Outputs able to drive 12 series terminated lines  
Crystal Oscillator Interface  
HiPerClockS™  
Crystal input frequency range: 10MHz to 40MHz  
Output skew: 80ps (maximum)  
LVCMOS/LVTTL outputs are designed to drive 50  
series or parallel terminated transmission lines. The effective  
fanout can be increased from 6 to 12 by utilizing the ability of the  
outputs to drive two series terminated lines.  
RMS phase jitter @ 25MHz, (100Hz – 1MHz): 0.26ps (typical),  
VDD = VDDO = 2.5V  
The ICS83905 is characterized at full 3.3V, 2.5V, and 1.8V, mixed  
3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply  
mode. Guaranteed output and part-to-part skew characteristics  
along with the 1.8V output capabilities makes the ICS83905 ideal  
for high performance, single ended applications that also require a  
limited output voltage.  
Offset  
Noise Power  
100Hz.................-129.7 dBc/Hz  
1kHz...................-144.4 dBc/Hz  
10kHz.................-147.3 dBc/Hz  
100kHz...............-157.3 dBc/Hz  
5V tolerant enable inputs  
Synchronous output enables  
Operating power supply modes:  
Full 3.3V, 2.5V, 1.8V  
Mixed 3.3V core/2.5V output operating supply  
Mixed 3.3V core/1.8V output operating supply  
Mixed 2.5V core/1.8V output operating supply  
Pin Assignments  
0°C to 70°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
20  
18 17 16  
19  
ICS83905  
packages  
GND  
1
2
3
4
5
BCLK5  
VDDO  
15  
14  
13  
12  
11  
20-Lead VFQFN  
4mm x 4mm x 0.925mm  
package body  
K Package  
GND  
BCLK0  
VDDO  
BCLK4  
GND  
GND  
BCLK1  
Top View  
6
7
8
9 10  
Block Diagram  
XTAL_IN  
XTAL_OUT  
ENABLE2  
GND  
1
2
3
4
5
6
7
8
16  
15  
14  
BCLK0  
ENABLE1  
BCLK5  
BCLK0  
VDDO  
BCLK1  
GND  
13 VDDO  
12  
BCLK1  
BCLK2  
BCLK3  
BCLK4  
BCLK5  
BCLK4  
XTAL_IN  
11  
10 BCLK3  
VDD  
GND  
9
XTAL_OUT  
BCLK2  
ICS83905  
16-Lead SOIC, 150 Mil  
3.9mm x 9.9mm x 1.38mm package body  
M Package  
Top View  
ENABLE 1  
ENABLE 2  
SYNCHRONIZE  
SYNCHRONIZE  
16-Lead TSSOP  
4.4mm x 5.0mm x 0.925mm package body  
G Package  
Top View  
ICS83905AM REVISION B JULY 20, 2009  
1
©2009 Integrated Device Technology, Inc.  

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