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83908AG-02LF PDF预览

83908AG-02LF

更新时间: 2024-11-19 01:11:43
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
16页 335K
描述
FemtoClock Crystal-to-LVDS 8-Output Clock Synthesizer

83908AG-02LF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP-24针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.82
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:7.8 mm湿度敏感等级:1
端子数量:24最高工作温度:70 °C
最低工作温度:最大输出时钟频率:200 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260主时钟/晶体标称频率:40 MHz
座面最大高度:1.2 mm最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

83908AG-02LF 数据手册

 浏览型号83908AG-02LF的Datasheet PDF文件第2页浏览型号83908AG-02LF的Datasheet PDF文件第3页浏览型号83908AG-02LF的Datasheet PDF文件第4页浏览型号83908AG-02LF的Datasheet PDF文件第5页浏览型号83908AG-02LF的Datasheet PDF文件第6页浏览型号83908AG-02LF的Datasheet PDF文件第7页 
FemtoClock® Crystal-to-LVDS  
8-Output Clock Synthesizer  
83908-02  
Datasheet  
General Description  
Features  
The 83908-02 is a low skew, high performance 1-to-8 Crystal  
Oscillator//Crystal-to-LVCMOS fanout buffer. The 83908-02 has  
selectable single-ended clock or two crystal-oscillator inputs. There is  
an output enable to disable the outputs by placing them into a  
high-impedance state.  
Eight LVCMOS / LVTTL outputs, 19typical output impedance at  
VDD = VDDO = 3.3V  
Two crystal oscillator input pairs  
One LVCMOS / LVTTL clock input  
Crystal input frequency range: 10MHz – 40MHz  
Output frequency: 200MHz (maximum)  
Output skew: 70ps (maximum) at VDD = VDDO = 3.3V  
Part-to-part skew: 700ps (maximum) at VDD = VDDO = 3.3V  
Guaranteed output and part-to-part skew characteristics make the  
83908-02 ideal for those applications demanding well defined  
performance and repeatability.  
RMS phase jitter @ 25MHz output, using a 25MHz crystal,  
(12kHz – 10MHz): 0.39ps (typical) at VDD = VDDO = 3.3V  
RMS phase noise at 25MHz  
Offset  
Noise Power  
100Hz................. -111.4 dBc/Hz  
1kHz................. -139.9 dBc/Hz  
10kHz................. -157.3 dBc/Hz  
100kHz................. -157.5 dBc/Hz  
Power Supply Voltage Modes:  
Core / Output  
3.3V / 3.3V  
3.3V / 2.5V  
3.3V / 1.8V  
2.5V / 2.5V  
2.5V / 1.8V  
0°C to 70°C ambient operating temperature  
Lead-free (RoHS 6) packaging  
Block Diagram  
Pin Assignment  
Pullup  
OE  
VDD  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
1
GND  
Pulldown  
XTAL_IN1  
XTAL_OUT1  
VDDO  
Q7  
Q6  
GND  
CLK_SEL0  
XTAL_OUT0  
VDDO  
3
4
5
6
7
Pulldown  
CLK_SEL1  
Q1  
GND  
XTAL_IN0  
Q5  
OSC  
Q3  
9
Q4  
0 0  
VDD0  
10  
VDDO  
CLK_SEL1  
OE  
XTAL_OUT0  
Q0  
CLK  
12  
83908-02  
XTAL_IN1  
OSC  
8 LVCMOS Outputs  
24-Lead, 173-MIL TSSOP  
4.4mm x 7.8mm x 0.925mm package body  
G Package  
0 1  
XTAL_OUT1  
Q7  
Top View  
1 0  
Pulldown  
CLK  
1 1  
©2016 Integrated Device Technology, Inc.  
1
Revision B, April 7, 2016  

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