Datasheet > 8312I

8312I

更新时间： 2024-11-05 01:23:43

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
18页	299K
描述
Low Skew, 1-to-12 LVCMOS/LVTTL Fanout Buffer

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8312I 数据手册

Low Skew, 1-to-12 LVCMOS/LVTTL

Fanout Buffer

8312I

Datasheet

General Description

Features

The 8312I is a low skew, 1-to-12 LVCMOS/ LVTTL Fanout Buffer

and a member of the family of High Performance Clock Solutions

from IDT. The 8312I single-ended clock input accepts LVCMOS or

LVTTL input levels. The low impedance LVCMOS outputs are

designed to drive 50 series or parallel terminated transmission

lines. The effective fanout can be increased from 12 to 24 by

utilizing the ability of the outputs to drive two series terminated

lines.

• Twelve LVCMOS/LVTTL outputs

• CLK input supports the following input types: LVCMOS, LVTTL

• Maximum output frequency: 250MHz

• Output skew: 160ps (maximum)

• Supply modes:

Core/Output

3.3V/3.3V

3.3V/2.5V

The 8312I is characterized at full 3.3V, 2.5V, and 1.8V, mixed

3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply

modes. Guaranteed output and part-to-part skew characteristics

along with the 1.8V output capabilities makes the 8312I ideal for

high performance, single ended applications that also require a

limited output voltage.

3.3V/1.8V

2.5V/2.5V

2.5V/1.8V

1.8V/1.8V

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package

Block Diagram

Pin Assignment

Pullup

CLK_EN

32 31 30 29 28 27 26 25

GND

V^DD

V^DDO

CLK_EN

Pulldown

Q[0:11]

CLK

GND

CLK

GND

V^DD

V^DDO

Pullup

GND

10 11 12 13 14 15 16

8312I

32-Lead LQFP

7mm x 7mm x 1.4mm package body

Y Package

Top View

December 14, 2015

12 3 4 5 6 7...18

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