TM
80C286/883
High Performance Microprocessor with Memory
Management and Protection
March 1997
Features
Description
• This Circuit is Processed in Accordance to MIL-STD- The Intersil 80C286/883 is a static CMOS version of the
883 and is Fully Conformant Under the Provisions of NMOS 80286 microprocessor. The 80C286/883 is an
Paragraph 1.2.1.
advanced, high-performance microprocessor with specially
optimized capabilities for multiple user and multi-tasking sys-
tems. The 80C286/883 has built-in memory protection that
supports operating system and task isolation as well as pro-
gram and data privacy within tasks. The 80C286/883
includes memory management capabilities that map 230
• Compatible with NMOS 80286/883
• Static CMOS Design for Low Power Operation
- ICCSB = 5mA Maximum
- ICCOP = 185mA Maximum (80C286-10/883)
- ICCOP = 220mA Maximum (80C286-12/883)
24
(one gigabyte) of virtual address space per task into 2
bytes (16 megabytes) of physical memory.
• Large Address Space
The 80C286/883 is upwardly compatible with 80C86 and
80C88 software (the 80C286/883 instruction set is a super-
set of the 80C86/80C88 instruction set). Using the 80C286/
883 real address mode, the 80C286/883 is object code com-
patible with existing 80C86 and 80C88 software. In pro-
tected virtual address mode, the 80C286/883 is source code
compatible with 80C86 and 80C88 software but may require
upgrading to use virtual address as supported by the
80C286/883’s integrated memory management and protec-
tion mechanism. Both modes operate at full 80C286/883
performance and execute a superset of the 80C86 and
80C88 instructions.
- 16 Megabytes Physical
- 1 Gigabyte Virtual per Task
• Integrated Memory Management, Four-Level Memory
Protection and Support for Virtual Memory and
Operating Systems
• Two 80C86 Upward Compatible Operating Modes
- 80C286/883 Real Address Mode
- Protected Virtual Address Mode
• Compatible with 80287 Numeric Data Co-Processor
The 80C286/883 provides special operations to support the
efficient implementation and execution of operating systems.
For example, one instruction can end execution of one task,
save its state, switch to a new task, load its state, and start
execution of the new task. The segment-not-present excep-
tion and restartable instructions.
Ordering Information
PACKAGE
TEMP. RANGE
10MHz
12.5MHz
CG80C286-12
IG80C286-12
16MHz
20MHz
25MHz
PKG. NO.
G68.B
68 Pin PGA
0oC to +70oC
-
CG80C286-16
CG80C286-20
-
-
-
-
-40oC to +85oC IG80C286-10
-
-
-
-
-
-
G68.B
-55oC to +125oC MG80C286-10/883 MG80C286-12/883
5962-9067801MXC 5962-9067802MXC
G68.B
G68.B
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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FN2948.1
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