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79RV3041-33J PDF预览

79RV3041-33J

更新时间: 2024-11-11 06:32:19
品牌 Logo 应用领域
艾迪悌 - IDT 微控制器和处理器外围集成电路微处理器时钟
页数 文件大小 规格书
34页 266K
描述
INTEGRATED RISController™ FOR LOW-COST SYSTEMS

79RV3041-33J 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:LCC
包装说明:QCCJ, LDCC84,1.2SQ针数:84
Reach Compliance Code:not_compliantECCN代码:3A001.A.3
HTS代码:8542.31.00.01风险等级:5.87
Is Samacsys:N其他特性:BURST BUS; 5 PIPELINE STAGES
地址总线宽度:32位大小:32
边界扫描:NO最大时钟频率:66.66 MHz
外部数据总线宽度:32格式:FIXED POINT
集成缓存:YESJESD-30 代码:S-PQCC-J84
JESD-609代码:e0长度:29.2862 mm
低功率模式:NO湿度敏感等级:1
端子数量:84最高工作温度:85 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC84,1.2SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):225电源:3.3 V
认证状态:Not Qualified座面最大高度:4.57 mm
速度:33 MHz子类别:Microprocessors
最大压摆率:225 mA最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Tin/Lead (Sn85Pb15)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:29.286 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

79RV3041-33J 数据手册

 浏览型号79RV3041-33J的Datasheet PDF文件第2页浏览型号79RV3041-33J的Datasheet PDF文件第3页浏览型号79RV3041-33J的Datasheet PDF文件第4页浏览型号79RV3041-33J的Datasheet PDF文件第5页浏览型号79RV3041-33J的Datasheet PDF文件第6页浏览型号79RV3041-33J的Datasheet PDF文件第7页 
IDT79R3041™  
INTEGRATED RISControllerFOR  
LOW-COST SYSTEMS  
IDT79R3041  
IDT79RV3041  
Integrated Device Technology, Inc.  
• Double-frequency clock input  
• 16.67MHz, 20MHz, 25MHz and 33MHz operation  
• 20MIPS at 25MHz  
• Low cost 84-pin PLCC packaging  
• On-chip 4-deep write buffer eliminates memory write stalls  
• On-chip 4-word read buffer supports burst or simple block  
reads  
FEATURES:  
• Instruction set compatible with IDT79R3000A  
and RISController Family MIPS RISC CPUs  
• High level of integration minimizes system cost  
— RISC CPU  
— Multiply/divide unit  
— Instruction Cache  
— Data Cache  
— Programmable bus interface  
• On-chip DMA arbiter  
• On-chip 24-bit timer  
• Boot from 8-bit, 16-bit, or 32-bit wide PROMs  
• Pin-andsoftware-compatiblefamilyincludesR3041,R3051,  
R3052, and R3081™  
• Complete software support  
— Optimizing compilers  
— Real-time operating systems  
— Monitors/debuggers  
— Floating Point emulation software  
— Page Description Languages  
— Programmable port width support  
• On-chip instruction and data caches  
— 2KB of Instruction Cache  
— 512B of Data Cache  
• Flexible bus interface allows simple, low-cost designs  
— Superset pin-compatible with RISController  
— Adds programmable port width interface  
(8-, 16-, and 32-bit memory sub-regions)  
— Adds programmable bus interface timing support  
(Extended address hold, Bus turn around time,  
Read/write masks)  
SBrCond(3:2)  
Clock  
Generator  
Unit  
Master Pipeline Control  
ClkIn  
System Control  
Coprocessor  
Integer  
CPU Core  
Int(5:3), SInt(2:0)  
Exception/Control  
Registers  
General Registers  
(32 x 32)  
ALU  
Shifter  
Bus Interface  
Registers  
PortSize  
Register  
Counter  
Registers  
Mult/Div Unit  
TC  
Address Adder  
PC Control  
Virtual Address  
32  
Physical Address Bus  
32  
Instruction  
Cache  
2kB  
Data  
Cache  
512B  
Data Bus  
R3051 Superset  
Bus Interface Unit  
4-deep  
Write  
Buffer  
4-deep  
DMA  
BIU  
Control  
Read  
Arbiter  
Buffer  
Data  
Unpack  
Unit  
Data  
Pack  
Unit  
Timing/ Interface  
Control  
Address/  
Data  
DMA Rd/Wr SysClk  
2905 drw 01  
Ctrl  
Ctrl  
Figure 1. R3041 Block Diagram  
RISController, R3041, R3051, R3052, R3081, ORION, IDT/sim, and IDT/kit are trademarks, and the IDT logo is a registered trademark of Integrated Device Technology, Inc.  
COMMERCIAL TEMPERATURE RANGE  
December 2008  
©1996 Integrated Device Technology, Inc.  
DSC-2905/5  
1

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