Datasheet
Brief
75P42100
NETWORK SEARCH ENGINE
32K x 72 Entries
To request the full IDT75P42100 datasheet, please contact your local
IDT Sales Representative or call 1-800-345-7015
BlockDiagram
DeviceDescription
IDT provides proven, industry-leading network search engines
(NSEs)andacomprehensivesuiteofsoftwarethatenableandaccelerate
theintelligentprocessingofnetworkservicesincommunicationsequip-
ment.AsapartofthecompleteIDTclassificationsubsystemthatincludes
content inspection engines, the IDT family of NSEs delivers high-
performance,feature-rich,easy-to-use,integratedsearchaccelerators.
TheIDT 75P42100NSEisahighperformancepipelinedlow-power,
synchronous full-ternary 32K x 72 entry device. Each entry location in
theNSEhasbothaDataentryandanassociatedMaskentry. TheNSE
devicesintegratecontentaddressablememory(CAM)technologywith
high-performancelogic. ThedevicecanperformLookupandLearnNSE
operationsplusRead,Write,BurstWrite,andDualWritemaintenance
operations.
LAST NSE
Configuration Registers
and
SRAM CONTROL
ASIC FEEDBACK
LAST SRAM
Ram Control Circuits
CLOCK
÷
2
CCLK
PHASE
P
R
I
Counter
BURST
RESET
S
I
O
R
I
Z
E
Index
Bus
ARRAY
T
Y
REQSTB
R/W
L
O
G
I
NSE
RESPONSE
BUS
Instruction
Command
Bus
E
N
C
O
D
E
R
NSE
REQUEST
BUS
C
D
E
C
O
D
E
Request
Data
Address
Bypass
DATA
The IDT 75P42100 NSE device has a bi-directional bus that is a
multiplexedaddressanddatabusthatcansupport100millionsustained
searchespersecond. Thisdeviceprovidesarraysegmentswhichcan
beconfiguredtoenablemultiplewidthlookupsfrom36to576bitswide.
TheIDT75P42100requiresa1.8-voltVDDsupply,auserselectable1.8
or2.5-voltVDDQ supply,anda2.5-voltVBIAS supply. This NSEdevice
provides the user with flexibility and control in determining the device
power. Only the array segments that will be used for a specific NSE
operation are powered up while the unused segments are not.
TheIDT75P42100NSEutilizesthelatesthigh-performance1.8V
CMOSprocessingtechnologyandis packagedinaJEDECStandard,
thermallyenhanced, lowprofile BallGridArray. The options include a
304 BGA, satisfying smaller footprint requirements and a 372 BGA
packagethatiscompatiblewiththeIDT64Kx72Entry(75P52100)and
128K x 72 Entry (75K62100) NSE devices.
Bus
Comparand Registers
Global Mask Registers
Result Register
MMOUT
MATCHOUT
5346 drw 01
SystemConfigurations
Figure 1.0 ASIC / Compatible NSE / SRAM configuration
TheIDTNSEs aredesignedtofulfilltheneeds ofvarious types of
networking systems. In solutions requiring data searching such as
routers,asystemconfigurationasshowninFigure1.0mayberealized.
Maximum flexibility is provided by allowing one board design to be
populatedtodayusingeithertheIDT75P42100or75P52100NSEsand
laterupgradedtouseIDT’s75K62100NSE.ApplicationsnoteAN-279
discusseshowtoaccommodateoneboarddesignforanyoftheseNSEs.
Inthiscompatibleconfiguration,theNSEinterfacesdirectlytoan
ASIC/FPGAforlookups androutes anIndextoanassociatedSRAM
device,whichsuppliesthenexthopaddressviaanSRAMDataBusto
the ASIC. The NSE provides the required control signals to directly
hookuptoZBT™orSynchronousPipelineBurstSRAM. Lookupresults
canalsobefeddirectlybacktotheASIC/FPGAwithouttheuseofexternal
SRAM.Controloftheassociatedhandshakesignalsisprovidedbyall
NSEstoadapttoeitherconfiguration.
Optional
IDT75P42100
ASIC
or
or
75P52100
or
75K62100
NetworkSearch
Engine
ZBT
or
FPGA
SyncSRAM
5346 drw02
JUNE 2003
1
DSC-5346/02
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
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