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75P52100S83BX PDF预览

75P52100S83BX

更新时间: 2024-11-22 09:55:47
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
3页 435K
描述
Telecom IC

75P52100S83BX 数据手册

 浏览型号75P52100S83BX的Datasheet PDF文件第2页浏览型号75P52100S83BX的Datasheet PDF文件第3页 
Datasheet  
Brief  
75P52100  
NETWORK SEARCH ENGINE  
64K x 72 Entries  
To request the full IDT75P52100 datasheet, please contact your local  
IDT Sales Representative or call 1-800-345-7015  
DeviceDescription  
BlockDiagram  
IDT provides proven, industry-leading network search engines  
(NSEs)andacomprehensivesuiteofsoftwarethatenableandaccelerate  
theintelligentprocessingofnetworkservicesincommunicationsequip-  
ment.AsapartofthecompleteIDTclassificationsubsystemthatincludes  
content inspection engines, the IDT family of NSEs delivers high-  
performance,feature-rich,easy-to-use,integratedsearchaccelerators.  
TheIDT 75P52100NSEisahighperformancepipelinedlow-power,  
synchronous full-ternary 64K x 72 entry device. Each entry location in  
theNSEhasbothaDataentryandanassociatedMaskentry. TheNSE  
devicesintegratecontentaddressablememory(CAM)technologywith  
high-performancelogic. ThedevicecanperformLookupandLearnNSE  
operationsplusRead,Write,BurstWrite,andDualWritemaintenance  
operations.  
The IDT 75P52100 NSE device has a bi-directional bus that is a  
multiplexedaddressanddatabusthatcansupport100millionsustained  
searchespersecond. Thisdeviceprovidesarraysegmentswhichcan  
beconfiguredtoenablemultiplewidthlookupsfrom36to576bitswide.  
TheIDT75P52100requiresa1.8-voltVDDsupply,auserselectable1.8  
or2.5-voltVDDQ supply,anda2.5-voltVBIAS supply. This NSEdevice  
provides the user with flexibility and control in determining the device  
power. Only the array segments that will be used for a specific NSE  
operation are powered up while the unused segments are not.  
The IDT 75P52100 utilizes IDT’s latest high-performance 1.8V  
CMOSprocessingtechnologyandis packagedinaJEDECStandard,  
thermallyenhanced, lowprofile BallGridArray. The options include a  
304 BGA, satisfying smaller footprint requirements and a 372 BGA  
package that is compatible with IDT's 32K x 72 Entry (75P42100) and  
128K x 72 Entry (75P62100) NSE devices.  
LAST NSE  
Configuration Registers  
and  
SRAM CONTROL  
ASIC FEEDBACK  
LAST SRAM  
Ram Control Circuits  
CLOCK  
÷
2
CCLK  
PHASE  
P
R
I
Counter  
BURST  
RESET  
S
I
O
R
I
Z
E
Index  
Bus  
ARRAY  
T
Y
REQSTB  
R/W  
L
O
G
I
NSE  
RESPONSE  
BUS  
Instruction  
Command  
Bus  
E
N
C
O
D
E
R
NSE  
REQUEST  
BUS  
C
D
E
C
O
D
E
Request  
Data  
Address  
Bypass  
DATA  
Bus  
Comparand Registers  
Global Mask Registers  
Result Register  
MMOUT  
MATCHOUT  
5333 drw 01  
SystemConfigurations  
TheIDTNSEs aredesignedtofulfilltheneeds ofvarious types of  
networking systems. In solutions requiring data searching such as  
routers,asystemconfigurationasshowninFigure1.0mayberealized.  
Maximum flexibility is provided by allowing one board design to be  
populatedtodayusingeithertheIDT75P42100or75P52100NSEsand  
laterupgradedtouseIDT’s75K62100NSE.ApplicationsnoteAN-279  
discusseshowtoaccommodateoneboarddesignforanyoftheseNSEs.  
Inthiscompatibleconfiguration,theNSEinterfacesdirectlytoan  
ASIC/FPGAforlookups androutes anIndextoanassociatedSRAM  
device,whichsuppliesthenexthopaddressviaanSRAMDataBusto  
the ASIC. The NSE provides the required control signals to directly  
hookuptoZBT™orSynchronousPipelineBurstSRAM. Lookupresults  
canalsobefeddirectlybacktotheASIC/FPGAwithouttheuseofexternal  
SRAM.Controloftheassociatedhandshakesignalsisprovidedbyall  
NSEstoadapttoeitherconfiguration.  
Figure 1.0 ASIC / Compatible NSE / SRAM configuration  
Optional  
IDT  
75P42100  
ASIC  
ZBT  
or  
or  
75P52100  
or  
or  
SyncSRAM  
FPGA  
75K62100  
Network Search Engine  
5333 drw02  
JUNE 2003  
1
DSC-5333/03  
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  

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