Datasheet > 74VHC541_04

74VHC541_04

更新时间： 2024-02-28 16:13:13

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输出元件
页数	文件大小	规格书
12页	297K
描述
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)

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中文翻译

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74VHC541_04 数据手册

74VHC541

OCTAL BUS BUFFER

WITH 3 STATE OUTPUTS (NON INVERTED)

■

HIGH SPEED: t = 3.5 ns (TYP.) at V = 5V

PD CC

LOW POWER DISSIPATION:

= 4 µA (MAX.) at T =25°C

■

HIGH NOISE IMMUNITY:

= V = 28% V (MIN.)

NIH

NIL

■

POWER DOWN PROTECTION ON INPUTS

SYMMETRICAL OUTPUT IMPEDANCE:

SOP

TSSOP

|I | = I = 8 mA (MIN)

Table 1: Order Codes

PACKAGE

■

BALANCED PROPAGATION DELAYS:

PLH

PHL

T & R

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 5.5V

SOP

74VHC541MTR

74VHC541TTR

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 541

TSSOP

■

IMPROVED LATCH-UP IMMUNITY

In order to enhance PC board layout, the

74VHC541 offers a pinout having inputs and

outputs on opposite sides of the package.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

LOW NOISE: V

= 0.9V (MAX.)

OLP

DESCRIPTION

The 74VHC541 is an advanced high-speed

CMOS OCTAL BUS BUFFER (3-STATE)

fabricated with sub-micron silicon gate and

double-layer metal wiring C MOS technology.

The 3 STATE control gate operates as two input

AND such that if either G1 or G2 are high, all eight

outputs are in the high impedance state.

Figure 1: Pin Connection And IEC Logic Symbols

Rev. 4

1/12

November 2004

12 3 4 5 6 7...12

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74VHC541M	STMICROELECTRONICS	获取价格	OCTAL BUS BUFFER WITH 3 STATE OUTPUTS NON INVERTED
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