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74LVXC3245WM_09 PDF预览

74LVXC3245WM_09

更新时间: 2024-02-24 23:04:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 253K
描述
8-Bit Dual Supply Configurable Voltage Interface Transceiver with 3-STATE Outputs

74LVXC3245WM_09 数据手册

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February 2009  
74LVXC3245  
8-Bit Dual Supply Configurable Voltage Interface  
Transceiver with 3-STATE Outputs  
Features  
Bidirectional interface between 3V and 3V-to-5V buses  
Control inputs compatible with TTL level  
Outputs source/sink up to 24 mA  
General Description  
The LVXC3245 is a 24-pin dual-supply, 8-bit configurable  
voltage interface transceiver suited for PCMCIA and other  
real time configurable I/O applications. The VCCA pin  
accepts a 3V supply level. The A Port is a dedicated 3V  
port. The VCCB pin accepts a 3V-to-5V supply level. The B  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Port is configured to track the VCCB supply level respec-  
tively. A 5V level on the VCC pin will configure the I/O pins  
at a 5V level and a 3V VCC will configure the I/O pins at a  
Implements proprietary EMI reduction circuitry  
Flexible VCCB operating range  
Allows B Port and VCCB to float simultaneously when OE  
is HIGH  
3V level. The A Port should interface with a 3V host system  
and the B Port to the card slots. This device will allow the  
V
CCB voltage source pin and I/O pins on the B Port to float  
Functionally compatible with the 74 series 245  
when OE is HIGH. This feature is necessary to buffer data  
to and from a PCMCIA socket that permits PCMCIA cards  
to be inserted and removed during normal operation.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LVXC3245WM  
74LVXC3245QSC  
74LVXC3245MTC  
M24B  
MQA24  
MTC24  
224-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol/s  
Connection Diagram/s  
Pin Descriptions  
Pin Names  
Description  
Output Enable Input  
Transmit/Receive Input  
OE  
T/R  
A0–A7  
B0–B7  
Side A Inputs or 3-STATE Outputs  
Side B Inputs or 3-STATE Outputs  
© 1994 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  

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