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74LVXC3245WM_NL PDF预览

74LVXC3245WM_NL

更新时间： 2024-11-15 12:59:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
8页 84K
描述
Bus Transceiver, LV/LV-A/LVX/H Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.300 INCH, LEAD FREE, MS-013, SOIC-24

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74LVXC3245WM_NL 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：24
Reach Compliance Code：unknown风险等级：5.66
其他特性：2.7V TO 3.6V SUPPLY FOR PORT A; 3V TO 5.5V SUPPLY FOR PORT B系列：LV/LV-A/LVX/H
JESD-30 代码：R-PDSO-G24JESD-609代码：e3
长度：15.4 mm逻辑集成电路类型：BUS TRANSCEIVER
位数：8功能数量：1
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
传播延迟（tpd）：9 ns认证状态：Not Qualified
座面最大高度：2.65 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：7.5 mm
Base Number Matches：1

74LVXC3245WM_NL 数据手册

 浏览型号74LVXC3245WM_NL的Datasheet PDF文件第2页浏览型号74LVXC3245WM_NL的Datasheet PDF文件第3页浏览型号74LVXC3245WM_NL的Datasheet PDF文件第4页浏览型号74LVXC3245WM_NL的Datasheet PDF文件第5页浏览型号74LVXC3245WM_NL的Datasheet PDF文件第6页浏览型号74LVXC3245WM_NL的Datasheet PDF文件第7页 
February 1994  
Revised October 2003  
74LVXC3245  
8-Bit Dual Supply Configurable Voltage Interface  
Transceiver with 3-STATE Outputs  
General Description  
The LVXC3245 is a 24-pin dual-supply, 8-bit configurable  
voltage interface transceiver suited for PCMCIA and other  
real time configurable I/O applications. The VCCA pin  
Features  
■ Bidirectional interface between 3V and 3V-to-5V buses  
■ Control inputs compatible with TTL level  
■ Outputs source/sink up to 24 mA  
accepts a 3V supply level. The A Port is a dedicated 3V  
port. The VCCB pin accepts a 3V-to-5V supply level. The B  
■ Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Port is configured to track the VCCB supply level respec-  
tively. A 5V level on the VCC pin will configure the I/O pins  
at a 5V level and a 3V VCC will configure the I/O pins at a  
■ Implements patented EMI reduction circuitry  
■ Flexible VCCB operating range  
■ Allows B Port and VCCB to float simultaneously when OE  
is HIGH  
3V level. The A Port should interface with a 3V host system  
and the B Port to the card slots. This device will allow the  
VCCB voltage source pin and I/O pins on the B Port to float  
■ Functionally compatible with the 74 series 245  
when OE is HIGH. This feature is necessary to buffer data  
to and from a PCMCIA socket that permits PCMCIA cards  
to be inserted and removed during normal operation.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LVXC3245WM  
74LVXC3245QSC  
74LVXC3245MTC  
M24B  
MQA24  
MTC24  
224-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
Output Enable Input  
Transmit/Receive Input  
OE  
T/R  
A0–A7  
B0–B7  
Side A Inputs or 3-STATE Outputs  
Side B Inputs or 3-STATE Outputs  
© 2003 Fairchild Semiconductor Corporation  
DS012008  
www.fairchildsemi.com  
12345678

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