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74LVTH2245DB,118 PDF预览

74LVTH2245DB,118

更新时间: 2024-11-19 10:26:51
品牌 Logo 应用领域
恩智浦 - NXP 信息通信管理光电二极管逻辑集成电路
页数 文件大小 规格书
15页 92K
描述
74LVT(H)2245 - 3.3 V octal transceiver with 30 Ohm termination resistors; 3-state SSOP2 20-Pin

74LVTH2245DB,118 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SSOP2包装说明:SSOP, SSOP20,.3
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.28
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:LVTJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:7.2 mm
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.012 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:4.6 ns
传播延迟(tpd):5.3 ns认证状态:Not Qualified
座面最大高度:2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30翻译:N/A
宽度:5.3 mm

74LVTH2245DB,118 数据手册

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74LVT2245; 74LVTH2245  
3.3 V octal transceiver with 30 termination resistors; 3-state  
Rev. 04 — 24 April 2006  
Product data sheet  
1. General description  
The 74LVT2245; 74LVTH2245 is a high-performance BiCMOS product designed for VCC  
operation at 3.3 V.  
This device is an octal transceiver featuring non-inverting 3-state bus compatible outputs  
in both send and receive directions. The control function implementation minimizes  
external timing requirements. The device features an output enable input (OE) for easy  
cascading and a direction input (DIR) for direction control.  
The 74LVT2245; 74LVTH2245 is designed with 30 series resistance in both the  
HIGH-state and LOW-state of the output. This design reduces line noise in applications  
such as memory address drivers, clock drivers and bus transceivers and transmitters.  
2. Features  
I 30 output termination resistors  
I Octal bidirectional bus interface  
I 3-state buffers  
I Output capability: +12 mA and 12 mA  
I TTL input and output switching levels  
I Input and output interface capability to systems at 5 V supply  
I Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs  
I Live insertion and extraction permitted  
I Power-up 3-state  
I No bus current loading when output is tied to 5 V bus  
I Latch-up protection:  
N JESD78: exceeds 500 mA  
I ESD protection:  
N MIL STD 883 method 3015: exceeds 2000 V  
N Machine model: exceeds 200 V  

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