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74LVT573WMX_NL PDF预览

74LVT573WMX_NL

更新时间： 2024-09-25 13:02:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
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74LVT573WMX_NL 数据手册

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March 1999  
Revised March 2005  
74LVT573 • 74LVTH573  
Low Voltage Octal Transparent Latch  
with 3-STATE Outputs  
General Description  
Features  
■ Input and output interface capability to systems at  
The LVT573 and LVTH573 consist of eight latches with  
3-STATE outputs for bus organized system applications.  
The latches appear transparent to the data when Latch  
Enable (LE) is HIGH. When LE is low, the data satisfying  
the input timing requirements is latched. Data appears on  
the bus when the Output Enable (OE) is LOW. When OE is  
HIGH, the bus output is in the high impedance state.  
5V VCC  
■ Bushold data inputs eliminate the need for external  
pull-up resistors to hold unused inputs (74LVTH573),  
also available without bushold feature (74LVT573)  
■ Live insertion/extraction permitted  
■ Power Up/Down high impedance provides glitch-free  
bus loading  
The LVTH573 data inputs include bushold, eliminating the  
need for external pull-up resistors to hold unused inputs.  
■ Outputs source/sink 32 mA/ 64 mA  
■ Functionally compatible with the 74 series 573  
■ Latch-up performance exceeds 500 mA  
■ ESD performance:  
These octal latches are designed for low-voltage (3.3V)  
VCC applications, but with the capability to provide a TTL  
interface to a 5V environment. The LVT573 and LVTH573  
are fabricated with an advanced BiCMOS technology to  
achieve high speed operation similar to 5V ABT while  
maintaining a low power dissipation.  
Human-body model 2000V  
Machine model 200V  
Charged-device model 1000V  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LVT573WM  
74LVT573SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LVT573MSA  
74LVT573MTC  
MSA20  
MTC20  
MTC20  
74LVT573MTCX_NL  
(Note 1)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
74LVTH573WM  
74LVTH573SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LVTH573MSA  
74LVTH573MTC  
MSA20  
MTC20  
MTC20  
74LVTH573MTCX_NL  
(Note 1)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS012450  
www.fairchildsemi.com  
12345678

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