生命周期: | Active | 包装说明: | VSSOP, |
Reach Compliance Code: | unknown | 风险等级: | 5.6 |
系列: | LVC/LCX/Z | JESD-30 代码: | R-PDSO-G8 |
长度: | 2.3 mm | 逻辑集成电路类型: | OR GATE |
功能数量: | 2 | 输入次数: | 2 |
端子数量: | 8 | 最高工作温度: | 125 °C |
最低工作温度: | -40 °C | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | VSSOP | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH | 传播延迟(tpd): | 11 ns |
筛选级别: | AEC-Q100 | 座面最大高度: | 1 mm |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 1.65 V |
标称供电电压 (Vsup): | 3.3 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | AUTOMOTIVE |
端子形式: | GULL WING | 端子节距: | 0.5 mm |
端子位置: | DUAL | 宽度: | 2 mm |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74LVC2G32DP | NXP |
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Dual 2-input OR gate | |
74LVC2G32DP | NEXPERIA |
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74LVC2G32DP-G | NXP |
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Dual 2-input OR gate - Description: Dual 2-input OR Gate ; Logic switching levels: TTL ; N | |
74LVC2G32DP-Q100 | NEXPERIA |
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74LVC2G32GD | NXP |
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Dual 2-input OR gate | |
74LVC2G32GM | NXP |
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Dual 2-input OR gate | |
74LVC2G32GM,115 | NXP |
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74LVC2G32 - Dual 2-input OR gate QFN 8-Pin | |
74LVC2G32GM,125 | NXP |
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74LVC2G32 - Dual 2-input OR gate QFN 8-Pin | |
74LVC2G32GM-G | NXP |
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IC LVC/LCX/Z SERIES, DUAL 2-INPUT OR GATE, PDSO8, 0.95 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, | |
74LVC2G32GN | NEXPERIA |
获取价格 |
Dual 2-input OR gateProduction |