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74LVC273D PDF预览

74LVC273D

更新时间: 2023-09-03 20:32:52
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
14页 254K
描述
Octal D-type flip-flop with reset; positive-edge triggerProduction

74LVC273D 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:SOP, SOP20,.4Reach Compliance Code:unknown
风险等级:5.64Is Samacsys:N
JESD-30 代码:R-PDSO-G20负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:125000000 Hz
最大I(ol):0.024 A湿度敏感等级:1
功能数量:8端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TUBE
电源:3.3 V认证状态:Not Qualified
子类别:FF/Latches标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
触发器类型:POSITIVE EDGEBase Number Matches:1

74LVC273D 数据手册

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74LVC273  
Octal D-type flip-flop with reset; positive-edge trigger  
Rev. 8 — 31 August 2021  
Product data sheet  
1. General description  
The 74LVC273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP)  
and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs  
that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW  
on MR forces the outputs LOW independently of clock and data inputs. Inputs can be driven from  
either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed  
3.3 V and 5 V environments.  
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.  
2. Features and benefits  
Wide supply voltage range from 1.2 V to 3.6 V  
Overvoltage tolerant inputs to 5.5 V  
CMOS low power consumption  
Direct interface with TTL levels  
Output drive capability 50 Ω transmission lines at +85 °C  
Complies with JEDEC standard:  
JESD8-7A (1.65 V to 1.95 V)  
JESD8-5A (2.3 V to 2.7 V)  
JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-B exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LVC273D  
74LVC273PW  
74LVC273BQ  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
SO20  
plastic small outline package; 20 leads;  
body width 7.5 mm  
SOT163-1  
TSSOP20  
plastic thin shrink small outline package; 20 leads;  
body width 4.4 mm  
SOT360-1  
SOT764-1  
DHVQFN20 plastic dual in-line compatible thermal enhanced  
very thin quad flat package; no leads; 20 terminals;  
body 2.5 × 4.5 × 0.85 mm  
 
 
 

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