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74LVC244ADB,118 PDF预览

74LVC244ADB,118

更新时间: 2024-01-16 15:55:10
品牌 Logo 应用领域
恩智浦 - NXP 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
18页 103K
描述
74LVC(H)244A - Octal buffer/line driver; 3-state SSOP2 20-Pin

74LVC244ADB,118 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SSOP2包装说明:SSOP, SSOP20,.3
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:7.6
控制类型:ENABLE LOW系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:7.2 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
湿度敏感等级:1位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:7.5 ns
传播延迟(tpd):9 ns认证状态:Not Qualified
座面最大高度:2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:5.3 mm
Base Number Matches:1

74LVC244ADB,118 数据手册

 浏览型号74LVC244ADB,118的Datasheet PDF文件第2页浏览型号74LVC244ADB,118的Datasheet PDF文件第3页浏览型号74LVC244ADB,118的Datasheet PDF文件第4页浏览型号74LVC244ADB,118的Datasheet PDF文件第5页浏览型号74LVC244ADB,118的Datasheet PDF文件第6页浏览型号74LVC244ADB,118的Datasheet PDF文件第7页 
74LVC244A; 74LVCH244A  
Octal buffer/line driver; 3-state  
Rev. 06 — 13 August 2009  
Product data sheet  
1. General description  
The 74LVC244A; 74LVCH244A is an octal non-inverting buffer/line driver with 3-state  
outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE.  
A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.  
Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise  
and fall times.  
Inputs can be driven from either 3.3 V or 5.0 V devices. In 3-state operation, outputs can  
handle 5 V. These features allow the use of these devices as translators in a mixed  
3.3 V and 5 V environment.  
The 74LVCH244A bus hold on data inputs eliminates the need for external pull-up  
resistors to hold unused inputs.  
2. Features  
I 5 V tolerant inputs/outputs for interfacing with 5 V logic  
I Wide supply voltage range from 1.2 V to 3.6 V  
I CMOS low-power consumption  
I Direct interface with TTL levels  
I Inputs accept voltages up to 5.5 V  
I High-impedance when VCC = 0 V  
I Bus hold on all data inputs (74LVCH244A only)  
I Complies with JEDEC standard no. 8-1A  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  
 
 

74LVC244ADB,118 替代型号

型号 品牌 替代类型 描述 数据表
74LVC244ADB,112 NXP

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