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74LVC244ADB-T PDF预览

74LVC244ADB-T

更新时间: 2024-01-29 07:29:53
品牌 Logo 应用领域
恩智浦 - NXP 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
19页 149K
描述
IC LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20, 5.30 MM, PLASTIC, MO-150, SOT339-1, SSOP-20, Bus Driver/Transceiver

74LVC244ADB-T 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:SSOP, SSOP20,.3Reach Compliance Code:unknown
风险等级:5.75控制类型:ENABLE LOW
JESD-30 代码:R-PDSO-G20逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A位数:4
功能数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP20,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH包装方法:TAPE AND REEL
电源:3.3 VProp。Delay @ Nom-Sup:5.9 ns
认证状态:Not Qualified子类别:Bus Driver/Transceivers
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

74LVC244ADB-T 数据手册

 浏览型号74LVC244ADB-T的Datasheet PDF文件第2页浏览型号74LVC244ADB-T的Datasheet PDF文件第3页浏览型号74LVC244ADB-T的Datasheet PDF文件第4页浏览型号74LVC244ADB-T的Datasheet PDF文件第5页浏览型号74LVC244ADB-T的Datasheet PDF文件第6页浏览型号74LVC244ADB-T的Datasheet PDF文件第7页 
74LVC244A; 74LVCH244A  
Octal buffer/line driver; 3-state  
Rev. 8 — 26 June 2013  
Product data sheet  
1. General description  
The 74LVC244A; 74LVCH244A is an octal non-inverting buffer/line driver with 3-state  
outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE.  
A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.  
Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise  
and fall times.  
Inputs can be driven from either 3.3 V or 5.0 V devices. In 3-state operation, outputs can  
handle 5 V. These features allow the use of these devices as translators in a mixed  
3.3 V and 5 V environment.  
The 74LVCH244A bus hold on data inputs eliminates the need for external pull-up  
resistors to hold unused inputs.  
2. Features and benefits  
5 V tolerant inputs/outputs for interfacing with 5 V logic  
Wide supply voltage range from 1.2 V to 3.6 V  
CMOS low-power consumption  
Direct interface with TTL levels  
Inputs accept voltages up to 5.5 V  
High-impedance when VCC = 0 V  
Bus hold on all data inputs (74LVCH244A only)  
Complies with JEDEC standard:  
JESD8-7A (1.65 V to 1.95 V)  
JESD8-5A (2.3 V to 2.7 V)  
JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115B exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Specified from 40 C to +85 C and 40 C to +125 C  
 
 

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