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74LV139BQ,115 PDF预览

74LV139BQ,115

更新时间: 2024-11-19 10:26:27
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
16页 104K
描述
74LV139 - Dual 2-to-4 line decoder/demultiplexer QFN 16-Pin

74LV139BQ,115 数据手册

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74LV139  
Dual 2-to-4 line decoder/demultiplexer  
Rev. 04 — 13 December 2007  
Product data sheet  
1. General description  
The 74LV139 is a low-voltage Si-gate CMOS device that is pin and function compatible  
with 74HC139 and 74HCT139.  
The 74LV139 is a dual 2-to-4 line decoder/demultiplexer. It has two independent  
decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four  
mutually exclusive outputs (nY0 to nY3) that are LOW when selected. Each decoder has  
an active LOW input (nE). When nE is HIGH, every output is forced HIGH. The enable  
input can be used as the data input for a 1-to-4 demultiplexer application.  
2. Features  
Wide operating voltage: 1.0 V to 5.5 V  
Optimized for low voltage applications: 1.0 V to 3.6 V  
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V  
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C  
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and  
Tamb = 25 °C  
Demultiplexing capability  
Two independent 2-to-4 line decoders  
Multifunction capability  
Active LOW mutually exclusive outputs  
ESD protection:  
HBM JESD22-A114E exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LV139N  
74LV139D  
40 °C to +125 °C  
40 °C to +125 °C  
DIP16  
SO16  
plastic dual in-line package; 16 leads (300 mil)  
SOT38-4  
SOT109-1  
plastic small outline package; 16 leads;  
body width 3.9 mm  

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