Datasheet > 74LV14BQ

74LV14BQ

更新时间： 2023-09-03 20:28:09

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
15页	255K
描述
Hex inverting Schmitt triggerProduction

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74LV14BQ 数据手册

74LV14

Hex inverting Schmitt trigger

Rev. 9 — 14 September 2021

Product data sheet

1. General description

The 74LV14 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC14

and 74HCT14.

The 74LV14 provides six inverting buffers with Schmitt-trigger input. It is capable of transforming

slowly-changing input signals into sharply defined, jitter-free output signals.

The inputs switch at different points for positive and negative-going signals. The difference between

the positive voltage V_T+and the negative voltage V_T-is defined as the input hysteresis voltage V_H.

2. Features and benefits

•

Wide supply voltage range from 1.0 V to 5.5 V

•

CMOS low power dissipation

Optimized for low voltage applications: 1.0 V to 3.6 V

Accepts TTL input levels between V_CC= 2.7 V and V_CC= 3.6 V

Typical output ground bounce < 0.8 V at V_CC= 3.3 V and T_amb= 25 °C

Typical HIGH-level output voltage (V_OH) undershoot: > 2 V at V_CC= 3.3 V and T_amb= 25 °C

Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

Complies with JEDEC standards:

•

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8C (2.7 V to 3.6 V)

JESD36 (4.5 V to 5.5 V)

•

ESD protection:

•

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

•

Multiple package options

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

3. Applications

•

Wave and pulse shapers for highly noisy environments

Astable multivibrators

Monostable multivibrators

12 3 4 5 6 7...15

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