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74LS257APCQM PDF预览

74LS257APCQM

更新时间: 2024-02-20 08:23:00
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 复用器
页数 文件大小 规格书
5页 59K
描述
暂无描述

74LS257APCQM 数据手册

 浏览型号74LS257APCQM的Datasheet PDF文件第2页浏览型号74LS257APCQM的Datasheet PDF文件第3页浏览型号74LS257APCQM的Datasheet PDF文件第4页浏览型号74LS257APCQM的Datasheet PDF文件第5页 
June 1989  
Revised November 1999  
DM74LS257B  
3-STATE Quad 2-Data Selectors/Multiplexers  
for data buses. It also permits the use of standard TTL reg-  
isters for data retention throughout the system.  
General Description  
These Schottky-clamped high-performance multiplexers  
feature 3-STATE outputs that can interface directly with  
data lines of bus-organized systems. With all but one of the  
common outputs disabled (at a high impedance state), the  
low impedance of the single enabled output will drive the  
bus line to a HIGH or LOW logic level. To minimize the pos-  
sibility that two outputs will attempt to take a common bus  
to opposite logic levels, the output enable circuitry is  
designed such that the output disable times are shorter  
than the output enable times.  
Features  
3-STATE versions LS157 and LS158 with same pinouts  
Schottky-clamped for significant improvement in A-C  
performance  
Provides bus interface from multiple sources in  
high-performance systems  
Average propagation delay from data input 12 ns  
Typical power dissipation: 50 mW  
This 3-STATE output feature means that n-bit (paralleled)  
data selectors with up to 258 sources can be implemented  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS257BM  
DM74LS257BN  
M16A  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Logic Diagram  
Function Table  
Inputs  
Output  
Output Y  
LS257  
Select  
A
B
Control  
H
L
L
L
L
X
L
X
L
X
X
X
L
Z
L
L
H
X
X
H
L
H
H
H
H
H = HIGH Level  
L = LOW Level  
X = Don’t Care  
Z = High Impedance (off)  
© 1999 Fairchild Semiconductor Corporation  
DS006417  
www.fairchildsemi.com  

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