Datasheet > 74HC259D.653

74HC259D.653

更新时间： 2022-04-12 02:39:06

品牌	Logo	应用领域
恩智浦 - NXP		锁存器
页数	文件大小	规格书
23页	174K
描述
8-bit addressable latch

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数据手册

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74HC259D.653 数据手册

74HC259; 74HCT259

NXP Semiconductors

8-bit addressable latch

Table 4.

Operating mode select table^[1]

Mode

Addressable latch mode

Memory mode

Demultiplexer mode

Reset mode

[1] H = HIGH voltage level; L = LOW voltage level.

7. Limiting values

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min

Max

+7.0

20

25

+70

Unit

V_CC

I_IK

supply voltage

0.5

[1]

input clamping current

output clamping current

output current

V_I< 0.5 V or V_I> V_CC+ 0.5 V

V_O< 0.5 V or V_O> V_CC+ 0.5 V

V_O= 0.5 V to V_CC+ 0.5 V

C

I_OK

I_O

I_CC

I_GND

T_stg

P_tot

supply current

ground current

70

65

storage temperature

total power dissipation

+150

T_amb= 40 C to +125 C

DIP16 package

[2]

[3]

[4]

[5]

750

500

SO16 package

(T)SSOP16 package

DHVQFN16 package

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] _totderates linearly with 12 mW/K above 70 C.

[3] P_totderates linearly with 8 mW/K above 70 C.

[4] P_totderates linearly with 5.5 mW/K above 60 C.

[5]

P_totderates linearly with 4.5 mW/K above 60 C.

74HC_HCT259

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 7 August 2012

5 of 22

1 2 3 456 7 8...23

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