Datasheet > 74HC155

74HC155

更新时间： 2024-09-25 22:45:59

品牌	Logo	应用领域
日立 - HITACHI		解码器解复用器
页数	文件大小	规格书
9页	52K
描述
Dual 2-to-4-line Decoders/Demultiplexers

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74HC155 数据手册

HD74HC155

Dual 2-to-4-line Decoders/Demultiplexers

Description

This circuit features dual 1-line-to-4-line demultiplexer with individual strobes and common binary-address

input. When both sections are enabled by the strobes, the common binary-address inputs sequentially

select and route associated input data to the appropriate output of each section. The individual strobes

permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input 1C is inverted

through its outputs. The inverter following the 1C data input permits use as a 3-to-8-line decoder or 1-to-8-

line demultiplexer without external gating.

Features

•

High Speed Operation: t_pd(A or B to Y) = 15 ns typ (C_L= 50 pF)

High Output Current: Fanout of 10 LSTTL Loads

Wide Operating Voltage: V_CC= 2 to 6 V

Low Input Current: 1 µA max

Low Quiescent Supply Current: I_CC(static) = 4 µA max (Ta = 25°C)

Function Table

2-line-to-4-line Decoder/1-line-to-4-line Demultiplexer

Inputs

Select

Strobe

Data

Outputs

1Y₀

1Y₁

1Y₂

1Y₃

12 3 4 5 6 7...9

中文翻译

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