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74F651SCX PDF预览

74F651SCX

更新时间: 2024-11-11 23:24:07
品牌 Logo 应用领域
其他 - ETC 总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
8页 85K
描述
Single 8-Bit Inverting Bus Transceiver

74F651SCX 数据手册

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March 1988  
Revised October 2000  
74F651 74F652  
Transceivers/Registers  
General Description  
Features  
These devices consist of bus transceiver circuits with  
D-type flip-flops, and control circuitry arranged for multi-  
plexed transmission of data directly from the input bus or  
from internal registers. Data on the A or B bus will be  
clocked into the registers as the appropriate clock pin goes  
to HIGH logic level. Output Enable pins (OEAB, OEBA) are  
provided to control the transceiver function.  
Independent registers for A and B buses  
Multiplexed real-time and stored data  
Choice of non-inverting and inverting data paths  
74F651 inverting  
74F652 non-inverting  
Ordering Code:  
Order Number Package Number  
Package Description  
74F651SC  
74F651SPC  
74F652SC  
74F652SPC  
M24B  
N24C  
M24B  
N24C  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
© 2000 Fairchild Semiconductor Corporation  
DS009581  
www.fairchildsemi.com  

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