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74F352DCQR PDF预览

74F352DCQR

更新时间: 2024-11-11 13:02:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 复用器
页数 文件大小 规格书
5页 50K
描述
Multiplexer, F/FAST Series, 2-Func, 4 Line Input, 1 Line Output, Inverted Output, TTL, CDIP16, CERAMIC, DIP-16

74F352DCQR 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:CERAMIC, DIP-16针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.46Is Samacsys:N
系列:F/FASTJESD-30 代码:R-GDIP-T16
JESD-609代码:e0长度:19.43 mm
逻辑集成电路类型:MULTIPLEXER功能数量:2
输入次数:4输出次数:1
端子数量:16最高工作温度:70 °C
最低工作温度:输出极性:INVERTED
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):9.5 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

74F352DCQR 数据手册

 浏览型号74F352DCQR的Datasheet PDF文件第2页浏览型号74F352DCQR的Datasheet PDF文件第3页浏览型号74F352DCQR的Datasheet PDF文件第4页浏览型号74F352DCQR的Datasheet PDF文件第5页 
May 1988  
Revised August 1999  
74F352  
Dual 4-Input Multiplexer  
General Description  
Features  
The 74F352 is a very high-speed dual 4-input multiplexer  
with common Select inputs and individual Enable inputs for  
each section. It can select two bits of data from four  
sources. The two buffered outputs present data in the  
inverted (complementary) form. The 74F352 is the func-  
tional equivalent of the 74F153 except with inverted out-  
puts.  
Inverted version of 74F153  
Separate enables for each multiplexer  
Input clamp diode limits high speed termination effects  
Ordering Code:  
Order Number Package Number  
Package Description  
74F352SJ  
74F352PC  
M16D  
N16E  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Truth Table  
Select  
Inputs  
Inputs (a or b)  
I0 I1 I2 I3  
Output  
Z
S0 S1  
E
X
L
X
L
L
L
H
L
L
L
X
L
X
X
X
L
X
X
X
X
X
X
X
X
H
H
L
L
H
X
H
H
H
L
L
H
H
H
H
L
L
L
L
L
X
X
X
X
X
H
X
X
X
X
X
L
X
X
X
L
L
H
L
L
H
X
X
H
H
H
L
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
© 1999 Fairchild Semiconductor Corporation  
DS009519  
www.fairchildsemi.com  

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