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74F322QC PDF预览

74F322QC

更新时间: 2024-11-26 13:00:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
6页 57K
描述
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74F322QC 数据手册

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April 1988  
Revised April 1999  
74F322  
Octal Serial/Parallel Register with Sign Extend  
parallel load. An asynchronous Master Reset (MR) input  
overrides clocked operation and clears the register.  
General Description  
The 74F322 is an 8-bit shift register with provision for either  
serial or parallel loading and with 3-STATE parallel outputs  
plus a bi-state serial output. Parallel data inputs and paral-  
lel outputs are multiplexed to minimize pin count. State  
changes are initiated by the rising edge of the clock. Four  
synchronous modes of operation are possible: hold (store),  
shift right with serial entry, shift right with sign extend and  
Features  
Multiplexed parallel I/O ports  
Separate serial input and output  
Sign extend function  
3-STATE outputs for bus applications  
Ordering Code:  
Order Number Package Number  
Package Description  
74F322PC  
N20A  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 1999 Fairchild Semiconductor Corporation  
DS009516.prf  
www.fairchildsemi.com  

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