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74F161ADCQM PDF预览

74F161ADCQM

更新时间: 2024-11-16 12:59:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器
页数 文件大小 规格书
8页 96K
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74F161ADCQM 数据手册

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April 1988  
Revised September 2000  
74F161A 74F163A  
Synchronous Presettable Binary Counter  
General Description  
Features  
Synchronous counting and loading  
High-speed synchronous expansion  
Typical count frequency of 120 MHz  
The 74F161A and 74F163A are high-speed synchronous  
modulo-16 binary counters. They are synchronously pre-  
settable for application in programmable dividers and have  
two types of Count Enable inputs plus a Terminal Count  
output for versatility in forming synchronous multi-stage  
counters. The 74F161A has an asynchronous Master-  
Reset input that overrides all other inputs and forces the  
outputs LOW. The 74F163A has a Synchronous Reset  
input that overrides counting and parallel loading and  
allows the outputs to be simultaneously reset on the rising  
edge of the clock. The 74F161A and 74F163A are high-  
speed versions of the 74F161 and 74F163.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F161ASC  
74F161ASJ  
74F161APC  
74F163ASC  
74F163ASJ  
74F163APC  
M16A  
M16D  
N16E  
M16A  
M16D  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
74F161A  
74F163A  
© 2000 Fairchild Semiconductor Corporation  
DS009486  
www.fairchildsemi.com  

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