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74F11SJX PDF预览

74F11SJX

更新时间: 2024-11-05 23:24:07
品牌 Logo 应用领域
其他 - ETC 触发器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 64K
描述
Triple 3-input AND Gate

74F11SJX 数据手册

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April 1988  
Revised September 2000  
74F11  
Triple 3-Input AND Gate  
General Description  
This device contains three independent gates, each of  
which performs the logic AND function.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F11SC  
74F11SJ  
74F11PC  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Unit Loading/Fan Out  
Input IIH/IIL  
U.L.  
Pin Names  
Description  
Output IOH/IOL  
HIGH/LOW  
1.0/1.0  
An, Bn, Cn  
On  
Inputs  
20 µA/0.6 mA  
1 mA/20 mA  
Outputs  
50/33.3  
© 2000 Fairchild Semiconductor Corporation  
DS009459  
www.fairchildsemi.com  

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