74AUP1G57GM,132 PDF预览

74AUP1G57GM,132

更新时间: 2025-10-06 14:40:15
品牌 Logo 应用领域
恩智浦 - NXP PC光电二极管逻辑集成电路
页数 文件大小 规格书
19页 90K
描述
74AUP1G57 - Low-power configurable multiple function gate SON 6-Pin

74AUP1G57GM,132 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SON包装说明:VSON, SOLCC6,.04,20
针数:6Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.12
系列:AUP/ULP/VJESD-30 代码:R-PDSO-N6
JESD-609代码:e3长度:1.45 mm
负载电容(CL):30 pF逻辑集成电路类型:LOGIC CIRCUIT
最大I(ol):0.0017 A湿度敏感等级:1
功能数量:1端子数量:6
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:VSON
封装等效代码:SOLCC6,.04,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:1.2/3.3 V
Prop。Delay @ Nom-Sup:22.3 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:0.5 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.1 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:1 mmBase Number Matches:1

74AUP1G57GM,132 数据手册

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74AUP1G57  
Low-power configurable multiple function gate  
Rev. 03 — 22 June 2009  
Product data sheet  
1. General description  
The 74AUP1G57 provides configurable multiple functions. The output state is determined  
by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,  
NOR, XNOR, inverter, and buffer. All inputs can be connected to VCC or GND.  
This device ensures a very low static and dynamic power consumption across the entire  
VCC range from 0.8 V to 3.6 V.  
This device is fully specified for partial power-down applications using IOFF. The IOFF  
circuitry disables the output, preventing the damaging backflow current through the device  
when it is powered down.  
The 74AUP1G57 has Schmitt trigger inputs making it capable of transforming slowly  
changing input signals into sharply defined, jitter-free output signals.  
The inputs switch at different points for positive and negative-going signals. The difference  
between the positive voltage VT+ and the negative voltage VTis defined as the input  
hysteresis voltage VH.  
2. Features  
I Wide supply voltage range from 0.8 V to 3.6 V  
I High noise immunity  
I ESD protection:  
N HBM JESD22-A114E exceeds 5000 V  
N MM JESD22-A115-A exceeds 200 V  
N CDM JESD22-C101C exceeds 1000 V  
I Low static power consumption; ICC = 0.9 µA (maximum)  
I Latch-up performance exceeds 100 mA per JESD 78 Class II  
I Inputs accept voltages up to 3.6 V  
I Low noise overshoot and undershoot < 10 % of VCC  
I IOFF circuitry provides partial Power-down mode operation  
I Multiple package options  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  
 
 

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