Datasheet > 74ALVC16838MTDX

74ALVC16838MTDX

更新时间： 2024-11-20 23:24:07

品牌	Logo	应用领域
其他 - ETC		逻辑集成电路光电二极管驱动
页数	文件大小	规格书
6页	92K
描述
BUFFER/FLIP-FLOP\|AVC/ALVC-CMOS\|TSSOP\|48PIN\|PLASTIC

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74ALVC16838MTDX 数据手册

December 2001

Revised December 2001

74ALVC16838

Low Voltage 16-Bit Selectable Register/Buffer

with 3.6V Tolerant Inputs and Outputs

General Description

Features

■ Compatible with PC100 and PC133 DIMM module

The ALVC16838 contains sixteen non-inverting selectable

buffered or registered paths. The device can be configured

to operate in a registered, or flow through buffer mode by

utilizing the register enable (REGE) and Clock (CLK) sig-

nals. The device operates in a 16-bit word wide mode. All

outputs can be placed into 3-State through use of the OE

Pin. These devices are ideally suited for buffered or regis-

tered 168 pin and 200 pin SDRAM DIMM memory mod-

ules.

specifications

■ 1.65V to 3.6V V_CCsupply operation

■ 3.6V tolerant inputs and outputs

■ t_PD(CLK to O_n)

3.5 ns max for 3.0V to 3.6V V_CC

4.5 ns max for 2.3V to 2.7V V_CC

8.0 ns max for 1.65V to 1.95V V_CC

The 74ALVC16838 is designed for low voltage (1.65V to

3.6V) V_CCapplications with I/O compatibility up to 3.6V.

■ Power-off high impedance inputs and outputs

■ Supports live insertion and withdrawal (Note 1)

■ Uses patented noise/EMI reduction circuitry

■ Ideal for SDRAM DIMM modules

■ Latchup conforms to JEDEC JED78

■ ESD performance:

The 74ALVC16838 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

Human body model > 2000V

Machine model > 200V

Note 1: To ensure the high-impedance state during power up or power

down, OE should be tied to V_CCthrough a pull-up resistor; the minimum

value of the resistor is determined by the current-sourcing capability of the

driver.

Ordering Code:

Order Number

Package Number

Package Description

74ALVC16838MTD

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Pin Names

Description

Output Enable Input (Active LOW)

Inputs

I₀–I₁₅

O₀–O₁₅

CLK

Outputs

Clock Input

REGE

DS500714

www.fairchildsemi.com

12 3 4 5 6

中文翻译

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与74ALVC16838MTDX相关器件

型号	品牌	获取价格	描述	数据表
74ALVC16839	FAIRCHILD	获取价格	Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs
74ALVC16839MTD	FAIRCHILD	获取价格	Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs
74ALVC16839MTDX	FAIRCHILD	获取价格	Buffer/Flip-Flop
74ALVC16841	FAIRCHILD	获取价格	Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs
74ALVC16841DGG	ETC	获取价格	10-Bit D-Type Latch
74ALVC16841MTD	FAIRCHILD	获取价格	Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs
74ALVC16841MTDX	FAIRCHILD	获取价格	10-Bit D-Type Latch
74ALVC16952DGG	ETC	获取价格	Dual 8-bit Bus Transceiver
74ALVC16952DGG-T	NXP	获取价格	IC ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/T
74ALVC16952DL	ETC	获取价格	Dual 8-bit Bus Transceiver

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