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74AHCT1G00GW,125 PDF预览

74AHCT1G00GW,125

更新时间: 2024-11-17 14:36:55
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
11页 62K
描述
74AHC(T)1G00 - 2-input NAND gate TSSOP 5-Pin

74AHCT1G00GW,125 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:TSSOP包装说明:TSSOP,
针数:5Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:6.99
Is Samacsys:N系列:AHCT/VHCT
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2 mm逻辑集成电路类型:NAND GATE
湿度敏感等级:1功能数量:1
输入次数:2端子数量:5
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):10 ns
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:1.25 mm
Base Number Matches:1

74AHCT1G00GW,125 数据手册

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74AHC1G00; 74AHCT1G00  
2-input NAND gate  
Rev. 06 — 30 May 2007  
Product data sheet  
1. General description  
74AHC1G00 and 74AHCT1G00 are high-speed Si-gate CMOS devices. They provide a  
2-input NAND function.  
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.  
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.  
2. Features  
I Symmetrical output impedance  
I High noise immunity  
I Low power dissipation  
I Balanced propagation delays  
I SOT353-1 and SOT753 package options  
I ESD protection:  
N HBM JESD22-A114E: exceeds 2000 V  
N MM JESD22-A115-A: exceeds 200 V  
N CDM JESD22-C101C: exceeds 1000 V  
I Specified from 40 °C to +125 °C  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range  
40 °C to +125 °C  
Name  
Description  
Version  
74AHC1G00GW  
74AHCT1G00GW  
74AHC1G00GV  
74AHCT1G00GV  
TSSOP5  
plastic thin shrink small outline package;  
5 leads; body width 1.25 mm  
SOT353-1  
40 °C to +125 °C  
SC-74A  
plastic surface-mounted package; 5 leads  
SOT753  
 
 
 

74AHCT1G00GW,125 替代型号

型号 品牌 替代类型 描述 数据表
74AHCT1G00GW,165 NXP

完全替代

74AHC(T)1G00 - 2-input NAND gate TSSOP 5-Pin
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完全替代

2-input NAND gate

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