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74ACTQ02_05 PDF预览

74ACTQ02_05

更新时间: 2024-11-02 04:47:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
8页 115K
描述
Quad 2-Input NOR Gate

74ACTQ02_05 数据手册

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August 1990  
Revised February 2005  
74ACTQ02  
Quad 2-Input NOR Gate  
General Description  
The ACTQ02 contains four, 2-input NOR gates.  
Features  
ICC reduced by 50%  
The ACTQ utilize Fairchild’s Quiet Series technology to  
guarantee quiet output switching and improved dynamic  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
threshold performance. FACT Quiet Series  
features  
Improved latch-up immunity  
Outputs source/sink 24 mA  
GTO output control and undershoot corrector in addition  
to a split ground bus for superior ACMOS performance.  
ACTQ02 has TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACTQ02SC  
74ACTQ02SJ  
74ACTQ02MTC  
74ACTQ02PC  
M14A  
M14D  
MTC  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
N14A  
Device also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
On  
Description  
Inputs  
Outputs  
FACT , FACT Quiet Series , and GTO are trademarks of Fairchild Semiconductor Corporation.  
© 2005 Fairchild Semiconductor Corporation  
DS010889  
www.fairchildsemi.com  

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