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74ACT825SCT PDF预览

74ACT825SCT

更新时间: 2024-11-02 13:02:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
7页 77K
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74ACT825SCT 数据手册

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July 1988  
Revised September 2000  
74ACT825  
8-Bit D-Type Flip-Flop  
General Description  
Features  
The ACT825 is an 8-bit buffered register. They have Clock  
Enable and Clear features which are ideal for parity bus  
interfacing in high performance microprogramming sys-  
tems. Also included are multiple enables that allow multi-  
use control of the interface. The ACT825 has noninverting  
outputs.  
Outputs source/sink 24 mA  
Inputs and outputs are on opposite sides  
TTL compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACT825SC  
74ACT825MTC  
74ACT825SPC  
M24B  
MTC24  
N24C  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
D0D7  
Description  
Data Inputs  
O0O7  
Data Outputs  
Output Enables  
Clock Enable  
Clear  
OE1, OE2, OE3  
EN  
CLR  
CP  
Clock Input  
FACT is a trademark of Fairchild Semiconductor.  
© 2000 Fairchild Semiconductor Corporation  
DS009895  
www.fairchildsemi.com  

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