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74ACT174MTR PDF预览

74ACT174MTR

更新时间: 2024-09-24 05:05:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
11页 254K
描述
HEX D-TYPE FLIP FLOP WITH CLEAR

74ACT174MTR 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP-16
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.32
Is Samacsys:N系列:ACT
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:140000000 Hz
最大I(ol):0.024 A湿度敏感等级:1
位数:6功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
传播延迟(tpd):11.5 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:140 MHz
Base Number Matches:1

74ACT174MTR 数据手册

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74ACT174  
HEX D-TYPE FLIP FLOP WITH CLEAR  
HIGH SPEED:  
= 200MHz (TYP.) at V = 5V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
COMPATIBLE WITH TTL OUTPUTS  
= 2V (MIN.), V = 0.8V (MAX.)  
V
IH  
IL  
DIP  
SOP  
TSSOP  
T & R  
50TRANSMISSION LINE DRIVING  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN)  
ORDER CODES  
PACKAGE  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
TUBE  
t
t
PLH  
PHL  
DIP  
SOP  
74ACT174B  
74ACT174M  
OPERATING VOLTAGE RANGE:  
(OPR) = 4.5V to 5.5V  
74ACT174MTR  
74ACT174TTR  
V
CC  
TSSOP  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 174  
IMPROVED LATCH-UP IMMUNITY  
When the CLEAR input is held low, the Q outputs  
are held low independentely of the other inputs.  
The device is designed to interface directly High  
Speed CMOS systems with TTL, NMOS and  
CMOS output voltage levels.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74ACT174 is an advanced high-speed CMOS  
HEX D-TYPE FLIP FLOP WITH CLEAR  
fabricated with sub-micron silicon gate and  
2
double-layer metal wiring C MOS tecnology.  
Information signals applied to D inputs are  
transferred to the Q output on the positive going  
edge of the clock pulse.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2001  
1/11  

74ACT174MTR 替代型号

型号 品牌 替代类型 描述 数据表
CD74ACT174ME4 TI

类似代替

HEX D-TYPE FLIP-FLOPS WITH CLEAR
CD74ACT174M96 TI

功能相似

HEX D-TYPE FLIP-FLOPS WITH CLEAR

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