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74ACT11827NT PDF预览

74ACT11827NT

更新时间: 2024-09-27 19:53:11
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
5页 87K
描述
10-Bit Buffers And Line Drivers 28-PDIP -40 to 85

74ACT11827NT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:DIP, DIP28,.3
Reach Compliance Code:not_compliant风险等级:5.83
其他特性:WITH DUAL OUTPUT ENABLE控制类型:ENABLE LOW
系列:ACTJESD-30 代码:R-PDIP-T28
长度:35.69 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
位数:10功能数量:1
端口数量:2端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP28,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:11.2 ns
传播延迟(tpd):11.2 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

74ACT11827NT 数据手册

 浏览型号74ACT11827NT的Datasheet PDF文件第2页浏览型号74ACT11827NT的Datasheet PDF文件第3页浏览型号74ACT11827NT的Datasheet PDF文件第4页浏览型号74ACT11827NT的Datasheet PDF文件第5页 
54ACT11827, 74ACT11827  
10-BIT BUFFERS/BUS DRIVERS  
WITH 3-STATE OUTPUTS  
SCAS078 – NOVEMBER 1989 – REVISED APRIL 1993  
54ACT11827 . . . JT PACKAGE  
74ACT11827 . . . DW PACKAGE  
Inputs Are TTL-Voltage Compatible  
3-State Outputs Drive Bus Lines or Buffer  
(TOP VIEW)  
Memory Address Registers  
Flow-Through Architecture to Optimize  
Y1  
Y2  
Y3  
Y4  
Y5  
GND  
GND  
GND  
GND  
Y6  
1
28 G1  
PCB Layout  
2
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
A1  
A2  
A3  
A4  
Center-Pin V  
and GND Configurations  
Minimize High-Speed Switching Noise  
3
CC  
4
5
EPIC (Enhanced-Performance Implanted  
6
A5  
CMOS) 1- m Process  
7
VCC  
VCC  
A6  
A7  
A8  
A9  
A10  
G2  
500-mA Typical Latch-Up Immunity  
at 125°C  
8
9
Package Options Include Plastic  
Small-Outline Packages, Ceramic Chip  
Carriers, and Standard Ceramic 300-mil  
DIPs  
10  
11  
12  
13  
14  
Y7  
Y8  
Y9  
Y10  
description  
These 10-bit buffers/bus drivers provide high-  
performance bus interface for wide data paths or  
buses carrying parity.  
54ACT11827 . . . FK PACKAGE  
(TOP VIEW)  
The3-statecontrolgateisa2-inputNORsuchthat  
if either G1 or G2 is high, all ten outputs are in the  
high-impedance state.  
4
3
2 1 28 27 26  
5
25 A8  
A2  
A1  
G1  
Y1  
Y2  
Y3  
Y4  
6
A9  
24  
23  
22  
21  
20  
19  
The ACT11827 provides inverted data.  
7
A10  
G2  
Y10  
Y9  
The 54ACT11827 is characterized for operation  
over the full military temperature range of – 55°C  
to 125°C. The 74ACT11827 is characterized for  
operation from – 40°C to 85°C.  
8
9
10  
11  
Y8  
12 13 14 15 16 17 18  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
G1  
L
G2  
L
A
H
L
H
L
L
L
X
H
X
X
X
Z
Z
H
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1993, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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