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74ACT11175N PDF预览

74ACT11175N

更新时间: 2024-11-09 14:40:15
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
6页 82K
描述
D Flip-Flop, ACT Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20

74ACT11175N 技术参数

生命周期:Contact Manufacturer包装说明:DIP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.75Is Samacsys:N
系列:ACTJESD-30 代码:R-PDIP-T20
长度:24.325 mm逻辑集成电路类型:D FLIP-FLOP
位数:4功能数量:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
传播延迟(tpd):10.1 ns座面最大高度:5.08 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:7.62 mm最小 fmax:100 MHz
Base Number Matches:1

74ACT11175N 数据手册

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ꢀ ꢁꢂ ꢃ ꢄꢅꢅꢅꢀ ꢆ  
ꢇ ꢈꢂꢉꢊ ꢈꢋꢌ ꢍꢎ ꢉꢏꢄ ꢐꢋꢍ ꢎꢑ ꢌ ꢒꢋꢏ ꢑ ꢌ ꢓ ꢋꢎꢔ ꢒ ꢄ ꢕꢎ ꢃ ꢌꢍ ꢂꢊ  
SCAS089 − D3385, DECEMBER 1989 − REVISED APRIL 1993  
DW OR N PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Buffered Clock and Direct Clear Inputs  
Applications Include: Buffer/Storage  
Registers, Shift Registers, Pattern  
Generators  
1Q  
2Q  
1Q  
CLR  
1D  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
2Q  
Fully-Buffered Outputs for Maximum  
GND  
GND  
GND  
GND  
3Q  
2D  
Isolation From External Disturbances  
V
V
CC  
CC  
Flow-Through Architecture to Optimize  
PCB Layout  
3D  
4D  
Center-Pin V  
and GND Configurations  
Minimize High-Speed Switching Noise  
CC  
3Q  
4Q  
CLK  
4Q  
EPICt (Enhanced-Performance Implanted  
CMOS) 1-mm Process  
500-mA Typical Latch-Up Immunity at 125°C  
Package Options Include Plastic Small-  
Outline Packages and Standard Plastic  
300-mil DIPs  
description  
This device contains six D-type flip-flops and is positive-edge-triggered with a direct clear input. Information  
at the D inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of  
the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition  
time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has  
no effect at the output.  
The 74AC11175 is characterized for operation from − 40°C to 85°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUTS  
CLR  
L
CLK  
X
D
X
H
L
Q
L
Q
H
L
H
H
L
H
H
H
L
X
Q
Q
0
0
EPIC is a trademark of Texas Instruments Incorporated.  
ꢄꢣ  
Copyright 1993, Texas Instruments Incorporated  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
ꢡꢣ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  

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