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74AC74

更新时间: 2024-11-18 22:53:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
11页 99K
描述
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

74AC74 数据手册

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74AC74  
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR  
HIGH SPEED:  
fMAX = 300 MHz (TYP.) at VCC =5V  
LOW POWER DISSIPATION:  
ICC = 4 µA (MAX.) at TA = 25 oC  
HIGH NOISE IMMUNITY:  
VNIH = VNIL = 28% VCC (MIN.)  
B
M
50TRANSMISSION LINE DRIVING  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL =24 mA (MIN)  
BALANCED PROPAGATION DELAYS:  
tPLH tPHL  
OPERATING VOLTAGE RANGE:  
(Plastic Package)  
(Micro Package)  
ORDER CODES :  
74AC74B  
74AC74M  
A signal on the D INPUT is transferred to the Q  
OUTPUT during the positive going transition of  
the clock pulse.  
CLEAR and PRESET are independent of the  
clock and accomplished by a low setting on the  
appropriate input.  
It is ideal for low power applications mantaining  
high speed operation similar to equivalent Bipolar  
SchottkyTTL.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
VCC (OPR) = 2V to 6V  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 74  
IMPROVED LATCH-UP IMMUNITY  
DESCRIPTION  
The AC74 is an advanced high-speed CMOS  
OCTAL D-TYPE FLIP FLOP WITH PRESET AND  
CLEAR NON INVERTING fabricated with  
sub-micron silicon gate and double-layer metal  
wiring C2MOS technology.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/11  
April 1997  

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