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74AC399DC PDF预览

74AC399DC

更新时间: 2024-11-06 19:58:07
品牌 Logo 应用领域
德州仪器 - TI 输出元件逻辑集成电路触发器
页数 文件大小 规格书
10页 187K
描述
AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP16, CERAMIC, DIP-16

74AC399DC 技术参数

生命周期:Transferred包装说明:DIP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.65其他特性:FOUR 2:1 MUX FOLLOWED BY REGISTER
系列:ACJESD-30 代码:R-GDIP-T16
长度:19.43 mm逻辑集成电路类型:D FLIP-FLOP
位数:4功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:5.08 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:165 MHzBase Number Matches:1

74AC399DC 数据手册

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October 1993  
74AC399 54ACT/74ACT399  
#
Quad 2-Port Register  
General Description  
The ’AC/ACT399 is the logical equivalent of a quad 2-input  
Features  
Y
CC  
I
reduced by 50%  
Y
Y
Y
Y
multiplexer feeding into four edge-triggered flip-flops.  
A
Select inputs from two data sources  
Fully positive edge-triggered operation  
Outputs source/sink 24 mA  
common Select input determines which of the two 4-bit  
words is accepted. The selected data enters the flip-flop on  
the rising edge of the clock.  
’ACT/ACT399 has TTL-compatible inputs  
Logic Symbols  
Connection Diagrams  
Pin Assignment  
for DIP, Flatpak and SOIC  
TL/F/9789–1  
IEEE/IEC  
TL/F/9789–3  
Pin Assignment  
for LCC  
TL/F/9789–5  
TL/F/9789–2  
Pin Names  
Description  
S
Common Select Input  
Clock Pulse Input  
CP  
I
–I  
0a 0d  
Data Inputs from Source 0  
Data Inputs from Source 1  
Register True Outputs  
I I  
1a 1d  
Q Q  
a
d
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation..  
FACTTM is a trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/9789  
RRD-B30M75/Printed in U. S. A.  

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