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74AC299 PDF预览

74AC299

更新时间: 2024-11-10 22:53:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 移位寄存器
页数 文件大小 规格书
13页 459K
描述
8 BIT PIPO SHIFT REGISTER WITH ASYNCHRONOUS CLEAR

74AC299 数据手册

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74AC299  
8 BIT PIPO SHIFT REGISTER  
WITH ASYNCHRONOUS CLEAR  
HIGH SPEED:  
= 240MHz (TYP.) at V = 5V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
= 8µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
50TRANSMISSION LINE DRIVING  
CAPABILITY  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN)  
ORDER CODES  
PACKAGE  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
TUBE  
t
t
PLH  
PHL  
DIP  
SOP  
74AC299B  
74AC299M  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
74AC299MTR  
74AC299TTR  
V
CC  
TSSOP  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 299  
IMPROVED LATCH-UP IMMUNITY  
S1) as shown in the Truth Table. When one or  
both enable inputs, (G1, G2) are high, the eight  
input/output terminals are in the high-impedance  
state; however sequential operation or clearing of  
the register is not affected. Clear function is  
asynchronous to clock.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74AC299 is an advanced high-speed CMOS  
8-BIT PIPO  
fabricated with sub-micron silicon gate and  
SHIFT REGISTER (3-STATE)  
2
double-layer metal wiring C MOS technology.  
These devices have four modes (HOLD, SHIFT  
LEFT, SHIFT RIGHT and LOAD DATA). Each  
mode is chosen by two function select inputs (S0,  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2001  
1/13  

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