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74AC240MTR PDF预览

74AC240MTR

更新时间: 2024-11-18 20:29:03
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
9页 223K
描述
Bus Driver, AC Series, 2-Func, 4-Bit, Inverted Output, CMOS, PDSO20, SOP-20

74AC240MTR 技术参数

生命周期:Contact Manufacturer包装说明:SOP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.6系列:AC
JESD-30 代码:R-PDSO-G20长度:12.8 mm
逻辑集成电路类型:BUS DRIVER位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE传播延迟(tpd):11 ns
座面最大高度:2.65 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

74AC240MTR 数据手册

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74AC240  
OCTAL BUS BUFFER  
WITH 3 STATE OUTPUTS (INVERTED)  
HIGH SPEED: t = 4.2ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 4µA(MAX.) at T =25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
50TRANSMISSION LINE DRIVING  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
TUBE  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
DIP  
SOP  
74AC240B  
74AC240M  
V
CC  
74AC240MTR  
74AC240TTR  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 240  
IMPROVED LATCH-UP IMMUNITY  
TSSOP  
This device is designed to be used with 3 state  
memory address drivers, etc.  
DESCRIPTION  
All inputand outputs are equipped with  
protecon circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
ltage.  
The 74AC240 is an advanced high-speed CMOS  
OCTAL BUS BUFFER (3-STATE) fabricated with  
sub-micron silicon gate and double-layer metal  
2
wiring C MOS tecnology.  
G control input governs four BUS BUFFERs.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2001  
1/9  

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