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74AC20MTR PDF预览

74AC20MTR

更新时间: 2024-11-25 23:23:59
品牌 Logo 应用领域
其他 - ETC 逻辑集成电路光电二极管
页数 文件大小 规格书
8页 62K
描述
Dual 4-input NAND Gate

74AC20MTR 数据手册

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74AC20  
DUAL 4-INPUT NAND GATE  
HIGH SPEED: t = 4ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 2µA(MAX.) at T =25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
V
NIH  
NIL  
CC  
50TRANSMISSION LINE DRIVING  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
DIP  
SOP  
TSSOP  
T & R  
|I | = I = 24mA (MIN)  
OH  
OL  
ORDER CODES  
PACKAGE  
BALANCED PROPAGATION DELAYS:  
TUBE  
t
t
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
DIP  
SOP  
74AC20B  
74AC20M  
V
74AC20MTR  
74AC20TTR  
CC  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 20  
TSSOP  
IMPROVED LATCH-UP IMMUNITY  
The internal circuit is composed of 3 stages  
including buffer output, which enables high noise  
immunity and stable output.  
DESCRIPTION  
The 74AC20 is an advanced high-speed CMOS  
DUAL 4-INPUT NAND GATE fabricated with  
sub-micron silicon gate and double-layer metal  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
2
wiring C MOS tecnology.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2001  
1/8  

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