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74AC240_08 PDF预览

74AC240_08

更新时间: 2024-11-26 12:33:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
11页 340K
描述
Octal Buffer/Line Driver with 3-STATE Outputs

74AC240_08 数据手册

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January 2008  
74AC240, 74ACT240  
Octal Buffer/Line Driver with 3-STATE Outputs  
Features  
General Description  
I and I reduced by 50%  
The AC/ACT240 is an octal buffer and line driver  
designed to be employed as a memory address driver,  
clock driver and bus oriented transmitter or receiver  
which provides improved PC board density.  
CC  
OZ  
Inverting 3-STATE outputs drive bus lines or buffer  
memory address registers  
Outputs source/sink 24mA  
ACT240 has TTL-compatible inputs  
Ordering Information  
Package  
Order Number  
74AC240SC  
Number  
Package Description  
M20B  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC240SJ  
M20D  
74AC240MTC  
MTC20  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
74AC240PC  
N20A  
M20B  
M20D  
MTC20  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74ACT240SC  
74ACT240SJ  
74ACT240MTC  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
74ACT240PC  
N20A  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
©2006 Fairchild Semiconductor Corporation  
74AC240, 74ACT240 Rev. 1.2.0  
www.fairchildsemi.com  

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