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74ABTE16245DLRG4 PDF预览

74ABTE16245DLRG4

更新时间： 2024-09-17 04:47:27
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德州仪器 - TI 总线收发器开关输出元件
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13页 214K
描述
16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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74ABTE16245DLRG4 数据手册

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SN54ABTE16245, SN74ABTE16245  
16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS226J – JULY 1993 – REVISED DECEMBER 2001  
SN54ABTE16245 . . . WD PACKAGE  
SN74ABTE16245 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
Support the VME64 ETL Specification  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
Reduced, TTL-Compatible, Input Threshold  
Range  
1DIR  
1B1  
2B1  
GND  
1B2  
2B2  
V
1A1  
2A1  
GND  
1A2  
2A2  
BIAS  
CC  
2
3
High-Drive Outputs (I  
= –60 mA,  
OH  
4
I
= 90 mA) Support 25-Ω Incident-Wave  
OL  
5
Switching  
6
V
BIAS Pin Minimizes Signal Distortion  
CC  
7
V
V
CC  
CC  
During Live Insertion  
8
1B3  
2B3  
GND  
1B4  
2B4  
1B5  
2B5  
GND  
1B6  
2B6  
1A3  
2A3  
GND  
1A4  
2A4  
1A5  
2A5  
GND  
1A6  
2A6  
Internal Pullup Resistor on OE Keeps  
Outputs in High-Impedance State During  
Power Up or Power Down  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
CC  
Equivalent 25-Ω Series Damping Resistor  
on B Port  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
V
V
CC  
CC  
1B7  
2B7  
GND  
1B8  
2B8  
1A7  
2A7  
GND  
1A8  
2A8  
OE  
description  
The ’ABTE16245 devices are 16-bit (dual-octal)  
noninverting 3-state transceivers designed for  
synchronous two-way communication between  
data buses. The control-function implementation  
minimizes external timing requirements. These  
devices can be used as two 8-bit transceivers or  
2DIR  
one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus,  
depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to  
disable the device so that the buses are effectively isolated. When OE is low, the device is active.  
The B port has an equivalent 25-Ω series output resistor to reduce ringing. Active bus-hold inputs also are on  
the B port to hold unused or floating inputs at a valid logic level.  
The A port provides for the precharging of the outputs via V BIAS, which establishes a voltage between 1.3 V  
CC  
and 1.7 V when V  
is not connected.  
CC  
Activebus-holdcircuitryholdsunusedorundriveninputsatavalidlogicstate. Useofpulluporpulldownresistors  
with the bus-hold circuitry is not recommended.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
Copyright 2001, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
unless otherwise noted. On all other products, production  
testing of all parameters.  
processing does not necessarily include testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...13

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