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74ABT646CSCX_NL PDF预览

74ABT646CSCX_NL

更新时间: 2024-11-25 21:13:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 信息通信管理光电二极管逻辑集成电路触发器
页数 文件大小 规格书
9页 96K
描述
Registered Bus Transceiver, ABT Series, 1-Func, 8-Bit, True Output, BICMOS, PDSO24, MS-153, SOIC-24

74ABT646CSCX_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:SOP, SOP24,.4
针数:24Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.09
其他特性:WITH DIRECTION CONTROL控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:ABT
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:15.4 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.064 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:4.8 ns传播延迟(tpd):10 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A触发器类型:POSITIVE EDGE
宽度:7.5 mmBase Number Matches:1

74ABT646CSCX_NL 数据手册

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April 1992  
Revised November 1999  
74ABT646  
Octal Transceivers and Registers with 3-STATE Outputs  
General Description  
Features  
The ABT646 consists of bus transceiver circuits with 3-  
STATE, D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the input bus  
or from the internal registers. Data on the A or B bus will be  
clocked into the registers as the appropriate clock pin goes  
to a high logic level. Control OE and direction pins are pro-  
vided to control the transceiver function. In the transceiver  
mode, data present at the high impedance port may be  
stored in either the A or the B register or in both. The select  
controls can multiplex stored and real-time (transparent  
mode) data. The direction control determines which bus  
will receive data when the enable control OE is Active  
LOW. In the isolation mode (control OE HIGH), A data may  
be stored in the B register and/or B data may be stored in  
the A register.  
Independent registers for A and B buses  
Multiplexed real-time and stored data  
A and B output sink capability of 64 mA, source capabil-  
ity of 32 mA  
Guaranteed output skew  
Guaranteed multiple output switching specifications  
Output switching specified for both 50 pF and 250 pF  
loads  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Guaranteed latchup protection  
High impedance glitch free bus loading during entire  
power up and power down cycle  
Nondestructive hot insertion capability  
Ordering Code:  
Order Number Package Number  
Package Description  
74ABT646CSC  
74ABT646CMSA  
74ABT646CMTC  
M24B  
MSA24  
MTC24  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-153, 4.4mm Wide  
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
A0A7  
Description  
Data Register A Inputs/3-STATE Outputs  
Data Register B Inputs/3-STATE Outputs  
Clock Pulse Inputs  
B0B7  
CPAB, CPBA  
SAB, SBA  
OE  
Select Inputs  
Output Enable Input  
DIR  
Direction Control Input  
© 1999 Fairchild Semiconductor Corporation  
DS010978  
www.fairchildsemi.com  

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