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74ABT544PW PDF预览

74ABT544PW

更新时间: 2024-01-18 00:20:29
品牌 Logo 应用领域
恩智浦 - NXP 逻辑集成电路光电二极管
页数 文件大小 规格书
19页 116K
描述
Octal latched transceiver with dual enable; inverting; 3-state

74ABT544PW 数据手册

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74ABT544  
Philips Semiconductors  
Octal latched transceiver with dual enable; inverting; 3-state  
Table 3:  
Symbol  
B3  
Pin description …continued  
Pin  
19  
20  
21  
22  
23  
24  
Description  
port B, 3-state output 3  
port B, 3-state output 2  
port B, 3-state output 1  
port B, 3-state output 0  
B-to-A enable input (active LOW)  
supply voltage  
B2  
B1  
B0  
EBA  
VCC  
7. Functional description  
7.1 Function table  
Table 4:  
Status  
Function table[1]  
Control  
Input  
Output  
OExx  
Exx  
X
LExx  
An or Bn  
An or Bn  
Disabled  
H
X
L
X
X
L
X
X
h
l
Z
H
Z
Disabled + latch  
Latch + display  
Transparent  
Hold  
Z
Z
L
L
L
L
L
L
h
l
L
H
L
L
H
H
L
X
H
NC  
[1] H = HIGH voltage level;  
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition;  
L = LOW voltage level;  
l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition;  
X = don’t care;  
= LOW-to-HIGH clock transition;  
NC = no change;  
Z = high-impedance OFF-state.  
9397 750 14756  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 03 — 20 April 2005  
5 of 19  

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