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73K302L PDF预览

73K302L

更新时间: 2024-01-05 15:42:53
品牌 Logo 应用领域
东电化 - TDK 调制解调器
页数 文件大小 规格书
29页 283K
描述
Single-Chip Modem

73K302L 技术参数

生命周期:Transferred包装说明:,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.29其他特性:FULL DUPLEX
数据速率:1.2 MbpsJESD-30 代码:R-PDIP-T28
功能数量:1端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
最大压摆率:12 mA标称供电电压:5 V
表面贴装:NO电信集成电路类型:MODEM
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子位置:DUAL

73K302L 数据手册

 浏览型号73K302L的Datasheet PDF文件第1页浏览型号73K302L的Datasheet PDF文件第3页浏览型号73K302L的Datasheet PDF文件第4页浏览型号73K302L的Datasheet PDF文件第5页浏览型号73K302L的Datasheet PDF文件第6页浏览型号73K302L的Datasheet PDF文件第7页 
73K302L  
Bell 212A, 103, 202  
Single-Chip Modem  
The SYNC/ASYNC converter also has an extended  
overspeed mode which allows selection of an output  
overspeed range of either +1% or +2.3%. In the  
extended overspeed mode, stop bits are output at  
7/8 the normal width.  
The serial data stream from the transmit buffer or the  
rate converter is passed through the data scrambler  
and onto the analog modulator. The data scrambler  
can be bypassed under processor control when  
unscrambled data must be transmitted. If serial input  
data contains a break signal through one character  
(including start and stop bits) the break will be  
extended to at least 2 times N + 3 bits long (where N  
is the number of transmitted bits/character).  
Serial data from the demodulator is passed first  
through the data descrambler and then through the  
SYNC/ASYNC converter. The ASYNC/ASYNC  
converter will reinsert any deleted stop bits and  
output data at an intra-character rate (bit-to-bit  
timing) of no greater than 1219 bit/s. An incoming  
break signal (low through two characters) will be  
passed through without incorrectly inserting a stop  
bit.  
DESCRIPTION (continued)  
asynchronous communications. The 73K302L is  
designed to appear to the systems designer as a  
microprocessor peripheral, and will easily interface  
with popular one-chip microprocessors (80C51  
typical) for control of modem functions through its 8-  
bit multiplexed address/data bus or via an optional  
serial command bus. An ALE control line simplifies  
address demultiplexing. Data communications  
occurs through a separate serial port only.  
The 73K302L is ideal for use in either free standing  
or integral system modem products where multi-  
standard data communications is desired. Its high  
functionality, low power consumption and efficient  
packaging simplify design requirements and  
increase system reliability. A complete modem  
requires only the addition of the phone line interface,  
a modem controller, and RS232 level converter for a  
typical system.  
Tri-mode capability in one-chip allows full-duplex  
Bell 212 and 103 operation or assymetrical Bell  
202S operation over the 2-wire switched telephone  
network. 202T mode full-duplex operation at 1200  
bit/s is also possible when operating on 4-wire  
leased lines.  
A soft carrier turn-off feature facilitates fast line turn  
around when using the 202S mode for half-duplex  
applications.  
The 73K302L is part of TDK Semiconduct K- Series  
family of pin and function compatible single-chip  
modem products. These devices allow systems to  
be configured for higher speeds and Bell or CCITT  
operation with only a single component change.  
SYNCHRONOUS MODE  
The Bell 212A standard defines synchronous  
operation at 1200 bit/s. Operation is similar to that of  
the asynchronous mode except that data must be  
synchronized to a provided clock and no variation in  
data transfer rate is allowable. Serial input data  
appearing at TXD must be valid on the rising edge of  
TXCLK.  
TXCLK is an internally derived signal in internal  
mode and is connected internally to the RXCLK pin  
in slave mode. Receive data at the RXD pin is  
clocked out on the falling edge of RXCLK. The  
ASYNCH/SYNCH converter is bypassed when  
synchronous mode is selected and data is  
transmitted out at the same rate as it is input.  
OPERATION  
ASYNCHRONOUS MODE  
Data transmission for the DPSK mode requires that  
data ultimately be transmitted in a synchronous  
fashion. The 73K302L includes ASYNC/SYNC and  
SYNC/ASYNC converters which delete or insert stop  
bits in order to transmit data at a regular rate. In  
asynchronous mode the serial data comes from the  
TXD pin into the ASYNC/SYNC converter. The  
ASYNC/SYNC converter accepts the data provided  
on the TXD pin which normally must be 1200 bit/s  
+1.0%, 2.5%. The rate converter will then insert or  
delete stop bits in order to output a signal which is  
DPSK MODULATOR/DEMODULATOR  
In DPSK mode the 73K302L modulates a serial bit  
stream into di-bit pairs that are represented by four  
possible phase shifts as prescribed by the Bell 212A  
standards. The base-band signal is then filtered to  
reduce intersymbol interference on the bandlimited  
2-wire telephone line. Transmission occurs using  
either a 1200 Hz (originate mode) or 2400 Hz  
(answer mode) carrier. Demodulation is the reverse  
of the modulation process, with the incoming analog  
1200 bit/s  
±
.01% (±0.01% is the required  
synchronous data rate accuracy).  
2

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